Inventor · disambiguated record
Dinkar Singh
Also filed as: SINGH DINKAR · SINGH DINKAR V · SINGH DINKAR VIRENDRA
17 granted patents·4 pending applications·223 citations·filing 2002–2012
94Inventor score
Top patents by PatentIndex Score
21 records- 0197US8012820B2Ultra-thin SOI CMOS with raised epitaxial source and drain and embedded SiGe PFET extensionIBM·Filed 2011·Granted Sep 6, 2011·38 cites·13 claims
- 0292US6911375B2Method of fabricating silicon devices on sapphire with wafer bonding at low temperatureIBM·Filed 2003·Granted Jun 28, 2005·64 cites·19 claims
- 0392US6740535B2Enhanced T-gate structure for modulation doped field effect transistorsIBM·Filed 2002·Granted May 25, 2004·53 cites·17 claims
- 0485US7374998B2Selective incorporation of charge for transistor channelsIBM·Filed 2006·Granted May 20, 2008·11 cites·16 claims
- 0582US7396776B2Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX)IBM·Filed 2006·Granted Jul 8, 2008·7 cites·1 claims
- 0681US8288826B2Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX)CHOU ANTHONY I·Filed 2011·Granted Oct 16, 2012·4 cites·18 claims
- 0778US8101150B2Control of carbon nanotube diameter using CVD or PECVD growthGRILL ALFRED·Filed 2009·Granted Jan 24, 2012·3 cites·19 claims
- 0878US7628974B2Control of carbon nanotube diameter using CVD or PECVD growthIBM·Filed 2003·Granted Dec 8, 2009·14 cites·15 claims
- 0977US6972440B2Enhanced T-gate structure for modulation doped field effect transistorsIBM·Filed 2004·Granted Dec 6, 2005·19 cites·10 claims
- 1073US8546920B2Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX)IBM·Filed 2012·Granted Oct 1, 2013·2 cites·17 claims
- 1172US7659583B2Ultrathin SOI CMOS devices employing differential STI linersIBM·Filed 2007·Granted Feb 9, 2010·4 cites·12 claims
- 1265US7713837B2Low temperature fusion bonding with high surface energy using a wet chemical treatmentIBM·Filed 2008·Granted May 11, 2010·2 cites·14 claims
- 1362US8021956B2Ultrathin SOI CMOS devices employing differential STI linersIBM·Filed 2010·Granted Sep 20, 2011·1 cites·8 claims
- 1458US7566631B2Low temperature fusion bonding with high surface energy using a wet chemical treatmentIBM·Filed 2006·Granted Jul 28, 2009·1 cites·1 claims
- 1553US8053373B2Semiconductor-on-insulator(SOI) structures including gradient nitrided buried oxide (BOX)IBM·Filed 2008·Granted Nov 8, 2011·0 cites·17 claims
- 1653US7687863B2Selective incorporation of charge for transistor channelsIBM·Filed 2008·Granted Mar 30, 2010·0 cites·7 claims
- 1752US2009289305A1Ultra-thin soi cmos with raised epitaxial source and drain and embedded sige pfet extensionIBM·Filed 2009·Application pending·0 cites
- 1848US2008217686A1Ultra-thin soi cmos with raised epitaxial source and drain and embedded sige pfet extensionIBM·Filed 2007·Application pending·0 cites
- 1946US7776624B2Method for improving semiconductor surfacesIBM·Filed 2008·Granted Aug 17, 2010·0 cites·9 claims
- 2039US2007284654A1Metal alloy layer over conductive region of transistor device of different conductive material than conductive regionRUBINO JUDITH M·Filed 2006·Application pending·0 cites
- 2139US2004126993A1Low temperature fusion bonding with high surface energy using a wet chemical treatmentFiled 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →