Inventor · disambiguated record
Steven J. Radigan
Also filed as: RADIGAN STEVEN · RADIGAN STEVEN J
39 granted patents·2 pending applications·558 citations·filing 1980–2016
98Inventor score
Files withSANDISK 3D LLC27NGUYEN NATALIE3CHEN YUNG-TIN2CANDESCENT TECH CORP1FAIRCHILD CAMERA INSTR CO1
Top patents by PatentIndex Score
41 records- 0198US7575984B2Conductive hard mask to protect patterned features during trench etchSANDISK 3D LLC·Filed 2006·Granted Aug 18, 2009·111 cites·17 claims
- 0298US7285464B2Nonvolatile memory cell comprising a reduced height vertical diodeSANDISK 3D LLC·Filed 2004·Granted Oct 23, 2007·139 cites·33 claims
- 0397US7935553B2Method for fabricating high density pillar structures by double patterning using positive photoresistSANDISK 3D LLC·Filed 2010·Granted May 3, 2011·27 cites·13 claims
- 0495US8187932B2Three dimensional horizontal diode non-volatile memory array and method of making thereofNGUYEN NATALIE·Filed 2010·Granted May 29, 2012·35 cites·12 claims
- 0594US7786015B2Method for fabricating self-aligned complementary pillar structures and wiringSANDISK 3D LLC·Filed 2008·Granted Aug 31, 2010·29 cites·16 claims
- 0694US7560339B2Nonvolatile memory cell comprising a reduced height vertical diodeSANDISK 3D LLC·Filed 2007·Granted Jul 14, 2009·22 cites·22 claims
- 0793US7923305B1Patterning method for high density pillar structuresSANDISK 3D LLC·Filed 2010·Granted Apr 12, 2011·16 cites·28 claims
- 0892US7553611B2Masking of repeated overlay and alignment marks to allow reuse of photomasks in a vertical structureSANDISK 3D LLC·Filed 2005·Granted Jun 30, 2009·21 cites·24 claims
- 0990US8114765B2Methods for increased array feature densityXU HUIWEN·Filed 2010·Granted Feb 14, 2012·8 cites·21 claims
- 1090US8080443B2Method of making pillars using photoresist spacer maskCHEN YUNG-TIN·Filed 2008·Granted Dec 20, 2011·16 cites·29 claims
- 1188US9666799B2Concave word line and convex interlayer dielectric for protecting a read/write layerSANDISK 3D LLC·Filed 2014·Granted May 30, 2017·7 cites·46 claims
- 1287US7927977B2Method of making damascene diodes using sacrificial materialSANDISK 3D LLC·Filed 2009·Granted Apr 19, 2011·11 cites·26 claims
- 1387US7732235B2Method for fabricating high density pillar structures by double patterning using positive photoresistSANDISK 3D LLC·Filed 2008·Granted Jun 8, 2010·10 cites·19 claims
- 1485US7794921B2Imaging post structures using x and y dipole optics and a single maskSANDISK 3D LLC·Filed 2006·Granted Sep 14, 2010·6 cites·32 claims
- 1584US8658526B2Methods for increased array feature densitySANDISK 3D LLC·Filed 2013·Granted Feb 25, 2014·4 cites·22 claims
- 1683US7759201B2Method for fabricating pitch-doubling pillar structuresSANDISK 3D LLC·Filed 2007·Granted Jul 20, 2010·8 cites·9 claims
- 1781US8329512B2Patterning method for high density pillar structuresNGUYEN NATALIE·Filed 2012·Granted Dec 11, 2012·4 cites·8 claims
- 1881US8026178B2Patterning method for high density pillar structuresSANDISK 3D LLC·Filed 2010·Granted Sep 27, 2011·4 cites·16 claims
- 1979US8357606B2Resist feature and removable spacer pitch doubling patterning method for pillar structuresSANDISK 3D LLC·Filed 2011·Granted Jan 22, 2013·3 cites·19 claims
- 2077US8987802B2Method for using nanoparticles to make uniform discrete floating gate layerSANDISK TECHNOLOGIES INC·Filed 2013·Granted Mar 24, 2015·4 cites·5 claims
- 2177US7968277B2Imaging post structures using X and Y dipole optics and a single maskSANDISK 3D LLC·Filed 2010·Granted Jun 28, 2011·2 cites·6 claims
- 2276US8637389B2Resist feature and removable spacer pitch doubling patterning method for pillar structuresSANDISK 3D LLC·Filed 2013·Granted Jan 28, 2014·2 cites·18 claims
- 2376US7718546B2Method for fabricating a 3-D integrated circuit using a hard mask of silicon-oxynitride on amorphous carbonSANDISK 3D LLC·Filed 2007·Granted May 18, 2010·6 cites·10 claims
- 2476US7682942B2Method for reducing pillar structure dimensions of a semiconductor deviceSANDISK 3D LLC·Filed 2007·Granted Mar 23, 2010·5 cites·8 claims
- 2575US7018878B2Metal structures for integrated circuits and methods for making the sameMATRIX SEMICONDUCTOR INC·Filed 2001·Granted Mar 28, 2006·21 cites·12 claims
- 2673US7982273B2Masking of repeated overlay and alignment marks to allow reuse of photomasks in a vertical structureSANDISK 3D LLC·Filed 2009·Granted Jul 19, 2011·4 cites·19 claims
- 2771US8138010B2Method for fabricating high density pillar structures by double patterning using positive photoresistSCHEUERLEIN ROY E·Filed 2011·Granted Mar 20, 2012·2 cites·20 claims
- 2868US8372740B2Methods for increased array feature densitySANDISK 3D LLC·Filed 2012·Granted Feb 12, 2013·1 cites·18 claims
- 2968US7994068B2Method for fabricating a 3-D integrated circuit using a hard mask of silicon-oxynitride on amorphous carbonSANDISK 3D LLC·Filed 2010·Granted Aug 9, 2011·2 cites·9 claims
- 3067US7754605B2Ultrashallow semiconductor contact by outdiffusion from a solid sourceSANDISK 3D LLC·Filed 2006·Granted Jul 13, 2010·2 cites·49 claims
- 3165US8084347B2Resist feature and removable spacer pitch doubling patterning method for pillar structuresCHEN YUNG-TIN·Filed 2008·Granted Dec 27, 2011·1 cites·24 claims
- 3263US4289574AProcess for patterning metal connections on a semiconductor structure by using an aluminum oxide etch resistant layerFAIRCHILD CAMERA INSTR CO·Filed 1980·Granted Sep 15, 1981·24 cites·7 claims
- 3357US8071475B2Liner for tungsten/silicon dioxide interface in memoryTANAKA YOICHIRO·Filed 2007·Granted Dec 6, 2011·1 cites·25 claims
- 3456US8018025B2Nonvolatile memory cell comprising a reduced height vertical diodeSANDISK 3D LLC·Filed 2009·Granted Sep 13, 2011·0 cites·46 claims
- 3555US8722518B2Methods for protecting patterned features during trench etchSANDISK 3D LLC·Filed 2013·Granted May 13, 2014·0 cites·17 claims
- 3655US2017040381A13D Memory Having Vertical Switches with Surround Gates and Method ThereofSANDISK TECHNOLOGIES LLC·Filed 2016·Application pending·0 cites
- 3754US2009273022A1Conductive hard mask to protect patterned features during trench etchSANDISK 3D LLC·Filed 2009·Application pending·0 cites
- 3852US8252644B2Method for forming a nonvolatile memory cell comprising a reduced height vertical diodeHERNER SCOTT BRAD·Filed 2011·Granted Aug 28, 2012·0 cites·9 claims
- 3951US8241969B2Patterning method for high density pillar structuresNGUYEN NATALIE·Filed 2011·Granted Aug 14, 2012·0 cites·5 claims
- 4041US7300876B2Method for cleaning slurry particles from a surface polished by chemical mechanical polishingSANDISK 3D LLC·Filed 2004·Granted Nov 27, 2007·0 cites·53 claims
- 4135US6734620B2Structure, fabrication, and corrective test of electron-emitting device having electrode configured to reduce cross-over capacitance and/or facilitate short-circuit repairCANDESCENT TECH CORP·Filed 2001·Granted May 11, 2004·0 cites·72 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →