Inventor · disambiguated record
Andrew Lines
Also filed as: LINES ANDREW · LINES ANDREW M
26 granted patents·6 pending applications·724 citations·filing 1998–2021
97Inventor score
Files withFULCRUM MICROSYSTEMS INC14CALIFORNIA INST OF TECHN6INTEL CORP5DIMOU GEORGIOS2FULCRUM MICROSYSTEMS INC A CAL1
Top patents by PatentIndex Score
32 records- 0195US7239669B2Asynchronous system-on-a-chip interconnectFULCRUM MICROSYSTEMS INC·Filed 2003·Granted Jul 3, 2007·67 cites·36 claims
- 0294US7161828B2Asynchronous static random access memoryFULCRUM MICROSYSTEMS INC·Filed 2005·Granted Jan 9, 2007·33 cites·34 claims
- 0393US7584449B2Logic synthesis of multi-level domino asynchronous pipelinesFULCRUM MICROSYSTEMS INC·Filed 2005·Granted Sep 1, 2009·35 cites·27 claims
- 0491US8051396B2Logic synthesis of multi-level domino asynchronous pipelinesFULCRUM MICROSYSTEMS INC·Filed 2009·Granted Nov 1, 2011·27 cites·20 claims
- 0588US7050324B2Asynchronous static random access memoryFULCRUM MICROSYSTEMS INC·Filed 2004·Granted May 23, 2006·39 cites·35 claims
- 0688US6038656APipelined completion for asynchronous communicationCALIFORNIA INST OF TECHN·Filed 1998·Granted Mar 14, 2000·149 cites·8 claims
- 0787US6658550B2Pipelined asynchronous processingCALIFORNIA INST OF TECHN·Filed 2002·Granted Dec 2, 2003·46 cites·1 claims
- 0885US6381692B1Pipelined asynchronous processingCALIFORNIA INST OF TECHN·Filed 1998·Granted Apr 30, 2002·109 cites·12 claims
- 0984US7934031B2Reshuffled communications processes in pipelined asynchronous circuitsCALIFORNIA INST OF TECHN·Filed 2006·Granted Apr 26, 2011·12 cites·16 claims
- 1084US6502180B1Asynchronous circuits with pipelined completion processCALIFORNIA INST OF TECHN·Filed 2000·Granted Dec 31, 2002·33 cites·10 claims
- 1183US7814280B2Shared-memory switch fabric architectureFULCRUM MICROSYSTEMS INC·Filed 2005·Granted Oct 12, 2010·16 cites·39 claims
- 1282US11037054B2Trace-based neuromorphic architecture for advanced learningINTEL CORP·Filed 2016·Granted Jun 15, 2021·4 cites·25 claims
- 1382US8370557B2Pseudo dual-port SRAM and a shared memory switch using multiple memory banks and a sideband memoryINTEL CORP·Filed 2008·Granted Feb 5, 2013·15 cites·10 claims
- 1482US8086975B2Power aware asynchronous circuitsSHIRING KEN·Filed 2009·Granted Dec 27, 2011·27 cites·20 claims
- 1582US6785875B2Methods and apparatus for facilitating physical synthesis of an integrated circuit designFULCRUM MICROSYSTEMS INC·Filed 2003·Granted Aug 31, 2004·34 cites·99 claims
- 1679US8448105B2Clustering and fanout optimizations of asynchronous circuitsDIMOU GEORGIOS·Filed 2009·Granted May 21, 2013·14 cites·23 claims
- 1779US6961863B2Techniques for facilitating conversion between asynchronous and synchronous domainsFULCRUM MICROSYSTEMS INC·Filed 2002·Granted Nov 1, 2005·24 cites·30 claims
- 1874US6950959B2Techniques for facilitating conversion between asynchronous and synchronous domainsFULCRUM MICROYSTEMS INC·Filed 2002·Granted Sep 27, 2005·22 cites·59 claims
- 1969US8954661B2Binary search pipelineLINES ANDREW·Filed 2010·Granted Feb 10, 2015·4 cites·16 claims
- 2069US7283557B2Asynchronous crossbar with deterministic or arbitrated controlFULCRUM MICROSYSTEMS INC·Filed 2002·Granted Oct 16, 2007·6 cites·72 claims
- 2167US7274710B2Asynchronous crossbar with deterministic or arbitrated controlFULCRUM MICROSYSTEMS INC·Filed 2002·Granted Sep 25, 2007·5 cites·20 claims
- 2265US2021304005A1Trace-based neuromorphic architecture for advanced learningINTEL CORP·Filed 2021·Application pending·0 cites
- 2355US8495543B2Multi-level domino, bundled data, and mixed templatesDIMOU GEORGIOS·Filed 2009·Granted Jul 23, 2013·3 cites·36 claims
- 2450US2006239392A1Asynchronous system-on-a-chip interconnectFULCRUM MICROSYSTEMS INC A CAL·Filed 2006·Application pending·0 cites
- 2547US7274709B2Asynchronous crossbar with deterministic or arbitrated controlFULCRUM MICROSYSTEMS INC·Filed 2002·Granted Sep 25, 2007·0 cites·19 claims
- 2646US2003140214A1Pipelined completion for asynchronous communicationCALIFORNIA INST OF TECHN·Filed 2002·Application pending·0 cites
- 2744US11908542B2Energy efficient memory array with optimized burst read and write data accessINTEL CORP·Filed 2019·Granted Feb 20, 2024·0 cites·20 claims
- 2844US7698535B2Asynchronous multiple-order issue system architectureFULCRUM MICROSYSTEMS INC·Filed 2003·Granted Apr 13, 2010·0 cites·41 claims
- 2943US10810488B2Neuromorphic core and chip traffic controlINTEL CORP·Filed 2016·Granted Oct 20, 2020·0 cites·25 claims
- 3043US2004030858A1Reshuffled communications processes in pipelined asynchronous circuitsFiled 2001·Application pending·0 cites
- 3142US2004100900A1Message transfer systemFULCRUM MICROSYSTEMS INC·Filed 2003·Application pending·0 cites
- 3236US2010325370A1Shared-memory switch fabric architectureFULCRUM MICROSYSTEMS INC·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →