Trace-based neuromorphic architecture for advanced learning

Abstract

A neuromorphic computing apparatus has a network of neuromorphic cores, with each core including an input axon and a plurality of neurons having synapses. The input axon is associated with an input data store to store an input trace representing a time series of filtered pre-synaptic spike events, and accessible by the synapses of the plurality of neurons of the core. Each neuron includes at least one dendritic compartment to store and process variables representing a dynamic state of the neuron. Each compartment is associated with a compartment-specific data store to store an output trace representing a time series of filtered post-synaptic spike events. Each neuron includes a learning engine to apply a set of one or more learning rules based on the pre-synaptic and post-synaptic spike events to produce an adjustment of parameters of a corresponding synapse to those spike events.

What is claimed is: 
     
         1 . An apparatus for a neuromorphic computing system, the apparatus comprising:
 a neural network core;   an axon;   an input data store;   a dendrite compartment;   a dendritic compartment specific data store; and   a learning engine;   wherein the input axon is associated with the input data store, the input data store configured to store an input trace representing a time series of pre-synaptic spike events accessible to a neuron of the neural network core;   wherein the dendritic compartment is provided to the neuron to store and process variables representing a dynamic state of the neuron;   wherein the dendritic compartment is associated with the compartment-specific data store to store an output trace representing a time series of post-synaptic spike events; and   wherein the learning engine is configured to perform a learning cycle by application of a learning rule, until a learning exit condition, based on the pre-synaptic and port-synaptic spike events to produce an adjustment for the neuron, wherein the learning exit condition is based on a comparison of pre-synaptic and post-synaptic state variables for the neuron.   
     
     
         2 . The apparatus of  claim 1 , wherein the adjustment of the parameters of the neuron include adjustment of a synapse of the neuron corresponding to the input axon, the adjustment including at least one of a weighting adjustment, a delay adjustment, or a tag adjustment. 
     
     
         3 . The apparatus of  claim 1 , wherein, to perform the learning cycle, the learning engine is configured to access a plurality of different learning rule profiles to retrieve the learning rule. 
     
     
         4 . The apparatus of  claim 1 , wherein, to perform the learning cycle, the learning engine is configured to apply a plurality of different learning rules. 
     
     
         5 . The apparatus of  claim 4 , wherein the plurality of different learning rules are expressed as a sum-of-products semantic, with each product comprising a programmable series of trace values, synaptic parameters, and constants. 
     
     
         6 . The apparatus of  claim 1 , wherein the learning engine is configured to perform the learning cycle in response to a predefined passage of time steps, wherein the predefined passage of time steps represents a learning epoch. 
     
     
         7 . The apparatus of  claim 6 , wherein the input data store maintains historical values of the input trace including time offsets of the pre-synaptic spike events, over a set of prior epochs, to facilitate historic reconstruction of the input trace. 
     
     
         8 . The apparatus of  claim 7 , wherein the historical values of the input trace are used to compute trace values for a current epoch at fanout synapses with nonzero network delay. 
     
     
         9 . The apparatus of  claim 6 , wherein the input data store and each trace-specific data store update stored traces only once per learning epoch except to record any spike event occurrences within the learning epoch. 
     
     
         10 . The apparatus of  claim 6 , wherein the learning engine is configured to apply the learning rule unconditionally in response to passage of a predefined number of learning epochs. 
     
     
         11 . The apparatus of  claim 1 , wherein the learning rule implements a spike timing-dependent plasticity (STDP) model of learning. 
     
     
         12 . The apparatus of  claim 1 , wherein the input axon is associated with a reinforcement-learning data store that stores at least one reinforcement-learning trace representing a temporal sequence of reinforcement-learning state variables. 
     
     
         13 . The apparatus of  claim 1 , wherein the input axon is a dedicated reward axon responsive to reinforcement-learning signaling, and further comprising:
 reading, processing, and adjusting, the reinforcement-learning signaling according to applicable learning rules.   
     
     
         14 . The apparatus of  claim 13 , wherein the reinforcement-learning signaling represents graded spike values. 
     
     
         15 . The apparatus of  claim 1 , wherein the input data store is configured to store a plurality of input traces. 
     
     
         16 . The apparatus of  claim 15 , wherein the plurality of input traces correspond to different time scales over which the pre-synaptic spike events are filtered. 
     
     
         17 . The apparatus of  claim 1 , wherein the compartment-specific data store is configured to store a plurality of output traces. 
     
     
         18 . The apparatus of  claim 17 , wherein the plurality of output traces correspond to different time scales over which the output spike events of that compartment are filtered. 
     
     
         19 . The apparatus of  claim 1 , wherein the neuron is configured to include:
 an input to accept pre-synaptic signaling from the input axon;   a synapse to store and distribute input and feedback signaling for processing, the synapse including a set of pre-synaptic terminals; and   an output to carry post-synaptic signaling from the neuron to other neurons.   
     
     
         20 . The apparatus of  claim 1 , further comprising:
 a forward-mapping data structure that associates fan-outs of the input axon with dendritic compartments that are responsive to stimuli arriving on the input axon.   
     
     
         21 . The apparatus of  claim 1 , further comprising;
 a backward-mapping data structure that associates each dendritic compartment to a corresponding set of fan-in input axons.   
     
     
         22 . A method for a neuromorphic computing system, the method comprising:
 associating an input axon with an input data store in a neural network core, the input data store configured to store an input trace representing a time series of pre-synaptic spike events accessible to a neuron of the neural network core;   providing the neuron with a dendritic compartment to store and process variables representing a dynamic state of the neuron;   associating a dendritic compartment with a compartment-specific data store of the neuron to store an output trace representing a time series of post-synaptic spike events; and   performing a learning cycle by applying a learning rule, until a learning exit condition, based on the pre-synaptic and port-synaptic spike events to produce an adjustment for the neuron, wherein the learning exit condition is based on a comparison of pre-synaptic and post-synaptic state variables for the neuron.   
     
     
         23 . The method of  claim 22 , wherein the adjustment of the parameters of the neuron include adjusting a synapse of the neuron corresponding to the input axon, the adjustment including at least one of a weighting adjustment, a delay adjustment, or a tag adjustment. 
     
     
         24 . At least on non-transitory machine readable medium including instructions that, when executed by processing circuitry, cause the processing circuitry to perform operations comprising:
 associating an input axon with an input data store in a neural network core, the input data store configured to store an input trace representing a time series of pre-synaptic spike events accessible to a neuron of the neural network core;   providing the neuron with a dendritic compartment to store and process variables representing a dynamic state of the neuron;   associating a dendritic compartment with a compartment-specific data store of the neuron to store an output trace representing a time series of post-synaptic spike events; and   performing a learning cycle by applying a learning rule, until a learning exit condition, based on the pre-synaptic and port-synaptic spike events to produce an adjustment for the neuron, wherein the learning exit condition is based on a comparison of pre-synaptic and post-synaptic state variables for the neuron.   
     
     
         25 . The at least on non-transitory machine readable medium  24 , wherein the adjustment of the parameters of the neuron include adjusting a synapse of the neuron corresponding to the input axon, the adjustment including at least one of a weighting adjustment, a delay adjustment, or a tag adjustment.