Inventor · disambiguated record
Chung Foong Tan
Also filed as: TAN CHUNG F · TAN CHUNG FOONG
40 granted patents·13 pending applications·451 citations·filing 2003–2023
97Inventor score
Files withCHARTERED SEMICONDUCTOR MFG10GLOBALFOUNDRIES SG PTE LTD9GLOBALFOUNDRIES US INC8TOH ENG HUAT8TAN CHUNG FOONG7
Top patents by PatentIndex Score
53 records- 0197US8492235B2FinFET with stressorsTOH ENG HUAT·Filed 2010·Granted Jul 23, 2013·29 cites·19 claims
- 0296US7169675B2Material architecture for the fabrication of low temperature transistorCHARTERED SEMICONDUCTOR MFG·Filed 2004·Granted Jan 30, 2007·164 cites·49 claims
- 0395US8502279B2Nano-electro-mechanical system (NEMS) structures with actuatable semiconductor fin on bulk substratesTOH ENG HUAT·Filed 2011·Granted Aug 6, 2013·24 cites·21 claims
- 0495US7109099B2End of range (EOR) secondary defect engineering using substitutional carbon dopingCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Sep 19, 2006·102 cites·20 claims
- 0592US8889494B2FinfetTOH ENG HUAT·Filed 2010·Granted Nov 18, 2014·14 cites·17 claims
- 0692US8748271B2LDMOS with improved breakdown voltageTOH ENG HUAT·Filed 2011·Granted Jun 10, 2014·13 cites·12 claims
- 0789US9812573B1Semiconductor structure including a transistor having stress creating regions and method for the formation thereofGLOBALFOUNDRIES INC·Filed 2016·Granted Nov 7, 2017·7 cites·20 claims
- 0889US8349692B2Channel surface technique for fabrication of FinFET devicesGLOBALFOUNDRIES SG PTE LTD·Filed 2011·Granted Jan 8, 2013·9 cites·18 claims
- 0987US8975708B2Semiconductor device with reduced contact resistance and method of manufacturing thereofGLOBALFOUNDRIES SG PTE LTD·Filed 2013·Granted Mar 10, 2015·6 cites·18 claims
- 1085US9219147B2LDMOS with improved breakdown voltageGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Granted Dec 22, 2015·6 cites·21 claims
- 1183US9406801B2FinFETGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Granted Aug 2, 2016·5 cites·20 claims
- 1281US10872979B2Spacer structures for a transistor deviceGLOBALFOUNDRIES INC·Filed 2020·Granted Dec 22, 2020·1 cites·17 claims
- 1381US9034711B2LDMOS with two gate stacks having different work functions for improved breakdown voltageTOH ENG HUAT·Filed 2011·Granted May 19, 2015·5 cites·12 claims
- 1481US8896072B2Channel surface technique for fabrication of FinFET devicesTAN CHUNG FOONG·Filed 2013·Granted Nov 25, 2014·5 cites·20 claims
- 1581US8674457B2Methods to reduce gate contact resistance for AC reff reductionTOH ENG HUAT·Filed 2010·Granted Mar 18, 2014·6 cites·18 claims
- 1676US7846800B2Avoiding plasma charging in integrated circuitsCHARTERED SEMICONDUCTOR MFG·Filed 2008·Granted Dec 7, 2010·6 cites·20 claims
- 1774US7071069B2Shallow amorphizing implant for gettering of deep secondary end of range defectsCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Jul 4, 2006·18 cites·24 claims
- 1872US10629739B2Methods of forming spacers adjacent gate structures of a transistor deviceGLOBALFOUNDRIES INC·Filed 2018·Granted Apr 21, 2020·1 cites·19 claims
- 1972US8110470B2Asymmetrical transistor device and method of fabricationTAN CHUNG FOONG·Filed 2009·Granted Feb 7, 2012·4 cites·27 claims
- 2072US7998835B2Strain-direct-on-insulator (SDOI) substrate and method of formingGLOBALFOUNDRIES SG PTE LTD·Filed 2008·Granted Aug 16, 2011·4 cites·16 claims
- 2171US8750037B2Non-volatile memory utilizing impact ionization and tunnelling and method of manufacturing thereofTOH ENG HUAT·Filed 2009·Granted Jun 10, 2014·4 cites·8 claims
- 2271US7400018B2End of range (EOR) secondary defect engineering using chemical vapor deposition (CVD) substitutional carbon dopingCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Jul 15, 2008·3 cites·6 claims
- 2367US8969151B2Integrated circuit system employing resistance altering techniquesTAN SHYUE SENG·Filed 2008·Granted Mar 3, 2015·3 cites·20 claims
- 2466US10032902B2LDMOS with improved breakdown voltage and with non-uniformed gate dielectric and gate electrodeGLOBALFOUNDRIES SG PTE LTD·Filed 2015·Granted Jul 24, 2018·1 cites·17 claims
- 2566US8778772B2Method of forming transistor with increased gate widthTAN CHUNG FOONG·Filed 2012·Granted Jul 15, 2014·3 cites·16 claims
- 2665US7994010B2Process for fabricating a semiconductor device having embedded epitaxial regionsCHARTERED SEMICONDUCTOR MFG·Filed 2007·Granted Aug 9, 2011·2 cites·19 claims
- 2764US12506070B2Electronically programmable fuse with heating transistorsGLOBALFOUNDRIES US INC·Filed 2023·Granted Dec 23, 2025·0 cites·20 claims
- 2864US9171953B2FinFET with stressorsGLOBALFOUNDRIES SG PTE LTD·Filed 2013·Granted Oct 27, 2015·1 cites·14 claims
- 2962US8629503B2Asymmetrical transistor device and method of fabricationTAN CHUNG FOONG·Filed 2012·Granted Jan 14, 2014·1 cites·20 claims
- 3062US8530310B2Memory cell with improved retentionTEO LEE WEE·Filed 2009·Granted Sep 10, 2013·2 cites·21 claims
- 3156US2024162345A1Transistor with metal field plate contactGLOBALFOUNDRIES US INC·Filed 2022·Application pending·0 cites
- 3255US2024194592A1Fuse structure with metal heater and heat spreading structure for fuse bodyGLOBALFOUNDRIES US INC·Filed 2022·Application pending·0 cites
- 3354US7833888B2Integrated circuit system employing grain size enlargementCHARTERED SEMICONDUCTOR MFG·Filed 2008·Granted Nov 16, 2010·0 cites·20 claims
- 3454US2024282853A1Device with workfunction metal in drift regionGLOBALFOUNDRIES US INC·Filed 2023·Application pending·0 cites
- 3553US11450573B2Structure with different stress-inducing isolation dielectrics for different polarity FETsGLOBALFOUNDRIES US INC·Filed 2020·Granted Sep 20, 2022·0 cites·18 claims
- 3652US2024282847A1High performance silicon controlled rectifier devicesGLOBALFOUNDRIES US INC·Filed 2023·Application pending·0 cites
- 3751US2016035873A1Finfet with stressorsGLOBALFOUNDRIES SG PTE LTD·Filed 2015·Application pending·0 cites
- 3850US10985244B2N-well resistorGLOBALFOUNDRIES US INC·Filed 2019·Granted Apr 20, 2021·0 cites·20 claims
- 3950US10797049B2FinFET structure with dielectric bar containing gate to reduce effective capacitance, and method of forming sameGLOBALFOUNDRIES INC·Filed 2018·Granted Oct 6, 2020·0 cites·17 claims
- 4050US2025006842A1Opening in stress-inducing liner(s) between transistorsGLOBALFOUNDRIES US INC·Filed 2023·Application pending·0 cites
- 4149US8470700B2Semiconductor device with reduced contact resistance and method of manufacturing thereofTOH ENG HUAT·Filed 2010·Granted Jun 25, 2013·0 cites·15 claims
- 4249US8242559B2Integrated circuit system with a floating dielectric region and method of manufacture thereofYIN CHUNSHAN·Filed 2009·Granted Aug 14, 2012·0 cites·10 claims
- 4348US8446779B2Non-volatile memory using pyramidal nanocrystals as electron storage elementsQUEK ELGIN·Filed 2009·Granted May 21, 2013·2 cites·9 claims
- 4447US2007117326A1Material architecture for the fabrication of low temperature transistorTAN CHUNG F·Filed 2007·Application pending·0 cites
- 4547US2011278645A1Strain-direct-on-insulator (sdoi) substrate and method of formingTEO LEE WEE·Filed 2011·Application pending·0 cites
- 4646US8824208B2Non-volatile memory using pyramidal nanocrystals as electron storage elementsGLOBALFOUNDRIES SG PTE LTD·Filed 2013·Granted Sep 2, 2014·0 cites·10 claims
- 4744US2010304556A1Integrated circuit system with vertical control gate and method of manufacture thereofCHARTERED SEMICONDUCTOR MFG·Filed 2009·Application pending·0 cites
- 4843US7816274B2Methods for normalizing strain in a semiconductor deviceCHARTERED SEMICONDUCTOR MFG·Filed 2008·Granted Oct 19, 2010·0 cites·19 claims
- 4943US2009184341A1Elimination of STI recess and facet growth in embedded silicon-germanium (eSiGe) moduleCHARTERED SEMICONDUCTOR MFG·Filed 2008·Application pending·0 cites
- 5040US8563386B2Integrated circuit system with bandgap material and method of manufacture thereofTAN CHUNG FOONG·Filed 2010·Granted Oct 22, 2013·0 cites·20 claims
Showing the top 50 of 53 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →