Inventor · disambiguated record
Sangmi Park
Also filed as: PARK SANGMI
11 granted patents·3 pending applications·87 citations·filing 2010–2023
87Inventor score
Files withSAMSUNG ELECTRONICS CO LTD3STATS CHIPPAC LTD3STATS CHIPPAC PTE LTD3CHOI DAESIK2KIM YOUNGJOON1
Top patents by PatentIndex Score
14 records- 0194US8816404B2Semiconductor device and method of forming stacked semiconductor die and conductive interconnect structure through an encapsulantKIM YOUNGJOON·Filed 2011·Granted Aug 26, 2014·53 cites·14 claims
- 0286US10665534B2Semiconductor device and method of using partial wafer singulation for improved wafer level embedded system in packageSTATS CHIPPAC PTE LTD·Filed 2017·Granted May 26, 2020·5 cites·18 claims
- 0386US8466567B2Integrated circuit packaging system with stack interconnect and method of manufacture thereofCHOI DAESIK·Filed 2010·Granted Jun 18, 2013·9 cites·14 claims
- 0479US8723310B2Integrated circuit packaging system having warpage prevention structuresPARK YISU·Filed 2012·Granted May 13, 2014·8 cites·10 claims
- 0579US8679900B2Integrated circuit packaging system with heat conduction and method of manufacture thereofCHOI DAESIK·Filed 2011·Granted Mar 25, 2014·6 cites·2 claims
- 0675US8372695B2Integrated circuit packaging system with stack interconnect and method of manufacture thereofSTATS CHIPPAC LTD·Filed 2010·Granted Feb 12, 2013·4 cites·10 claims
- 0765US9794606B2Transmission of digital content to select devicesSAMSUNG ELECTRONICS CO LTD·Filed 2014·Granted Oct 17, 2017·2 cites·19 claims
- 0865US2023275013A1Semiconductor Device and Method of Forming Conductive Vias to Have Enhanced Contact to Shielding LayerSTATS CHIPPAC PTE LTD·Filed 2023·Application pending·0 cites
- 0954US9318380B2Semiconductor device and method of forming stacked semiconductor die and conductive interconnect structure through an encapsulantSTATS CHIPPAC LTD·Filed 2014·Granted Apr 19, 2016·0 cites·23 claims
- 1052US2019318984A1Semiconductor Device and Method of Forming Conductive Vias to Have Enhanced Contact to Shielding LayerSTATS CHIPPAC PTE LTD·Filed 2018·Application pending·0 cites
- 1147US9799590B2Semiconductor device and method of using partial wafer singulation for improved wafer level embedded system in packageSTATS CHIPPAC LTD·Filed 2013·Granted Oct 24, 2017·0 cites·21 claims
- 1243US9872176B2Method for processing authentication, electronic device and server for supporting the sameSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted Jan 16, 2018·0 cites·18 claims
- 1339US2013328220A1Integrated circuit packaging system with film assist and method of manufacture thereofLEE KYUNGHOON·Filed 2012·Application pending·0 cites
- 1435US10735390B2Method for authentication and electronic device supporting the sameSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted Aug 4, 2020·0 cites·6 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →