Inventor · disambiguated record
Michael Konevecki
Also filed as: KONEVECKI MICHAEL · KONEVECKI MICHAEL W
32 granted patents·2 pending applications·970 citations·filing 2004–2016
97Inventor score
Top patents by PatentIndex Score
34 records- 0199US7915164B2Method for forming doped polysilicon via connecting polysilicon layersSANDISK 3D LLC·Filed 2010·Granted Mar 29, 2011·251 cites·7 claims
- 0298US7575984B2Conductive hard mask to protect patterned features during trench etchSANDISK 3D LLC·Filed 2006·Granted Aug 18, 2009·111 cites·17 claims
- 0398US7566974B2Doped polysilicon via connecting polysilicon layersSANDISK 3D LLC·Filed 2004·Granted Jul 28, 2009·190 cites·17 claims
- 0497US8233308B2Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the sameSCHRICKER APRIL·Filed 2007·Granted Jul 31, 2012·80 cites·39 claims
- 0596US9450023B1Vertical bit line non-volatile memory with recessed word linesSANDISK 3D LLC·Filed 2015·Granted Sep 20, 2016·39 cites·27 claims
- 0696US9202694B2Vertical bit line non-volatile memory systems and methods of fabricationSANDISK 3D LLC·Filed 2014·Granted Dec 1, 2015·54 cites·21 claims
- 0795US8187932B2Three dimensional horizontal diode non-volatile memory array and method of making thereofNGUYEN NATALIE·Filed 2010·Granted May 29, 2012·35 cites·12 claims
- 0894US7517796B2Method for patterning submicron pillarsSANDISK 3D LLC·Filed 2005·Granted Apr 14, 2009·22 cites·21 claims
- 0993US7923305B1Patterning method for high density pillar structuresSANDISK 3D LLC·Filed 2010·Granted Apr 12, 2011·16 cites·28 claims
- 1093US7307013B2Nonselective unpatterned etchback to expose buried patterned featuresSANDISK 3D LLC·Filed 2004·Granted Dec 11, 2007·67 cites·91 claims
- 1192US7906392B2Pillar devices and methods of making thereofSANDISK 3D LLC·Filed 2008·Granted Mar 15, 2011·21 cites·3 claims
- 1290US8987119B2Pillar devices and methods of making thereofDUNTON VANCE·Filed 2011·Granted Mar 24, 2015·15 cites·35 claims
- 1389US7846782B2Diode array and method of making thereofSANDISK 3D LLC·Filed 2007·Granted Dec 7, 2010·13 cites·12 claims
- 1486US8298931B2Dual damascene with amorphous carbon for 3D deep via/trench applicationRAGHURAM USHA·Filed 2007·Granted Oct 30, 2012·12 cites·22 claims
- 1585US7794921B2Imaging post structures using x and y dipole optics and a single maskSANDISK 3D LLC·Filed 2006·Granted Sep 14, 2010·6 cites·32 claims
- 1681US8329512B2Patterning method for high density pillar structuresNGUYEN NATALIE·Filed 2012·Granted Dec 11, 2012·4 cites·8 claims
- 1781US8026178B2Patterning method for high density pillar structuresSANDISK 3D LLC·Filed 2010·Granted Sep 27, 2011·4 cites·16 claims
- 1880US8913417B2Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the sameSCHRICKER APRIL·Filed 2012·Granted Dec 16, 2014·3 cites·20 claims
- 1978US9704920B2Resistive random access memory containing a steering element and a tunneling dielectric elementSANDISK 3D LLC·Filed 2015·Granted Jul 11, 2017·3 cites·19 claims
- 2077US9558949B2Vertical bit line non-volatile memory systems and methods of fabricationSANDISK 3D LLC·Filed 2015·Granted Jan 31, 2017·2 cites·20 claims
- 2177US7968277B2Imaging post structures using X and Y dipole optics and a single maskSANDISK 3D LLC·Filed 2010·Granted Jun 28, 2011·2 cites·6 claims
- 2276US7718546B2Method for fabricating a 3-D integrated circuit using a hard mask of silicon-oxynitride on amorphous carbonSANDISK 3D LLC·Filed 2007·Granted May 18, 2010·6 cites·10 claims
- 2374US7915163B2Method for forming doped polysilicon via connecting polysilicon layersSANDISK 3D LLC·Filed 2009·Granted Mar 29, 2011·4 cites·13 claims
- 2470US8445385B2Methods for etching carbon nano-tube films for use in non-volatile memoriesSCHRICKER APRIL D·Filed 2009·Granted May 21, 2013·3 cites·36 claims
- 2569US9853090B2Vertical bit line non-volatile memory systems and methods of fabricationSANDISK TECHNOLOGIES LLC·Filed 2016·Granted Dec 26, 2017·1 cites·17 claims
- 2668US7994068B2Method for fabricating a 3-D integrated circuit using a hard mask of silicon-oxynitride on amorphous carbonSANDISK 3D LLC·Filed 2010·Granted Aug 9, 2011·2 cites·9 claims
- 2768US7955515B2Method of plasma etching transition metal oxidesSANDISK 3D LLC·Filed 2007·Granted Jun 7, 2011·2 cites·11 claims
- 2856US8759176B2Patterning of submicron pillars in a memory arrayRAGHURAM USHA·Filed 2009·Granted Jun 24, 2014·0 cites·21 claims
- 2955US8722518B2Methods for protecting patterned features during trench etchSANDISK 3D LLC·Filed 2013·Granted May 13, 2014·0 cites·17 claims
- 3054US2009273022A1Conductive hard mask to protect patterned features during trench etchSANDISK 3D LLC·Filed 2009·Application pending·0 cites
- 3152US7846785B2Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the sameSANDISK 3D LLC·Filed 2007·Granted Dec 7, 2010·2 cites·20 claims
- 3251US8241969B2Patterning method for high density pillar structuresNGUYEN NATALIE·Filed 2011·Granted Aug 14, 2012·0 cites·5 claims
- 3345US8268678B2Diode array and method of making thereofMAXWELL STEVEN·Filed 2010·Granted Sep 18, 2012·0 cites·5 claims
- 3442US2007010100A1Method of plasma etching transition metals and their compoundsMATRIX SEMICONDUCTOR INC·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →