Inventor · disambiguated record
Christopher B. Reynolds
Also filed as: REYNOLDS CHRISTOPHER B
15 granted patents·3 pending applications·83 citations·filing 2003–2011
92Inventor score
Top patents by PatentIndex Score
18 records- 0191US8174329B2Power management architecture and method of modulating oscillator frequency based on voltage supplyGOODNOW KENNETH J·Filed 2010·Granted May 8, 2012·11 cites·23 claims
- 0284US8381161B1Method for providing a secure “gray box” view proprietary IPIBM·Filed 2011·Granted Feb 19, 2013·12 cites·20 claims
- 0380US7644327B2System and method of providing error detection and correction capability in an integrated circuit using redundant logic cells of an embedded FPGAIBM·Filed 2008·Granted Jan 5, 2010·8 cites·7 claims
- 0479US7282949B2FPGA powerup to known functional stateIBM·Filed 2005·Granted Oct 16, 2007·8 cites·20 claims
- 0578US7489163B2FPGA powerup to known functional stateIBM·Filed 2007·Granted Feb 10, 2009·7 cites·9 claims
- 0668US7304493B2FPGA powerup to known functional stateIBM·Filed 2006·Granted Dec 4, 2007·5 cites·20 claims
- 0767US7512813B2Method for system level protection of field programmable logic devicesIBM·Filed 2004·Granted Mar 31, 2009·12 cites·4 claims
- 0864US7750670B2System and method for dynamically executing a function in a programmable logic arrayIBM·Filed 2008·Granted Jul 6, 2010·3 cites·14 claims
- 0963US7793251B2Method for increasing the manufacturing yield of programmable logic devicesIBM·Filed 2006·Granted Sep 7, 2010·4 cites·10 claims
- 1059US7417453B2System and method for dynamically executing a function in a programmable logic arrayIBM·Filed 2005·Granted Aug 26, 2008·2 cites·5 claims
- 1159US7373567B2System and method of providing error detection and correction capability in an integrated circuit using redundant logic cells of an embedded FPGAIBM·Filed 2004·Granted May 13, 2008·7 cites·19 claims
- 1253US6954085B2System and method for dynamically executing a function in a programmable logic arrayIBM·Filed 2003·Granted Oct 11, 2005·4 cites·23 claims
- 1349US7937560B2Processor pipeline architecture logic state retention systems and methodsIBM·Filed 2008·Granted May 3, 2011·0 cites·6 claims
- 1445US7882334B2Processor pipeline architecture logic state retention systems and methodsIBM·Filed 2006·Granted Feb 1, 2011·0 cites·17 claims
- 1544US2010333058A1Method for increasing the manufacturing yield of programmable logic devicesIBM·Filed 2010·Application pending·0 cites
- 1643US2008256503A1Power management architecture and method of modulating oscillator frequency based on voltage supplyIBM·Filed 2007·Application pending·0 cites
- 1739US7105385B2FPGA blocks with adjustable porosity pass thruIBM·Filed 2003·Granted Sep 12, 2006·0 cites·5 claims
- 1837US2008068100A1Power management architecture and method of modulating oscillator frequency based on voltage supplyGOODNOW KENNETH J·Filed 2006·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →