US2008256503A1PendingUtilityA1

Power management architecture and method of modulating oscillator frequency based on voltage supply

Assignee: IBMPriority: Sep 12, 2006Filed: Oct 22, 2007Published: Oct 16, 2008
Est. expirySep 12, 2026(~0.1 yrs left)· nominal 20-yr term from priority
H03K 3/0315
43
PatentIndex Score
0
Cited by
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Claims

Abstract

A method and system for modulating logic clock oscillator frequency based on voltage supply. The system comprises a logic unit having a logic operation and a device to produce self-adjusting clocks to match the logic operation. The device is configured to use supply voltage as an independent variable to optimize device parameters for voltage variations. The invention is also directed to a design structure on which a circuit resides.

Claims

exact text as granted — not AI-modified
1 . A design structure embodied in a machine readable medium, the design structure comprising:
 a logic unit having a logic operation frequency; and   a device to produce self-adjusting clocks to match the logic operation frequency, the device being configured to use supply voltage as an independent variable to optimize device parameters for different voltage variations in the supply voltage.   
   
   
       2 . The design structure of  claim 1 , wherein the design structure comprises a netlist, which describes the circuit. 
   
   
       3 . The design structure of  claim 1 , wherein the design structure resides on storage medium as a data format used for the exchange of layout data of integrated circuits. 
   
   
       4 . The design structure of  claim 1 , wherein the design structure includes at least one of test data files, characterization data, verification data, or design specifications. 
   
   
       5 . A design structure embodied in a computer readable medium for performing a method, the design structure comprising:
 means for finding a path with worst case slack for Vmin to Vmax;   means for extracting and saving path data of the path with the worst case slack; and   means for creating and placing a feedback reference path into the circuit when a last process corner is found and V DD =Vmax.

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