Inventor · disambiguated record
Igor G. Kouznetsov
Also filed as: KOUZNETSOV IGOR · KOUZNETSOV IGOR G
40 granted patents·8 pending applications·1,008 citations·filing 2001–2020
98Inventor score
Files withCYPRESS SEMICONDUCTOR CORP29Longitude Flash Memory Solutions Ltd5SANDISK 3D LLC4MATRIX SEMICONDUCTOR INC3HIROSE RYAN T2
Top patents by PatentIndex Score
48 records- 0199US6888750B2Nonvolatile memory on SOI and compound semiconductor substrates and method of fabricationMATRIX SEMICONDUCTOR INC·Filed 2001·Granted May 3, 2005·497 cites·20 claims
- 0298US8853765B2Dense arrays and charge storage devicesSANDISK 3D LLC·Filed 2014·Granted Oct 7, 2014·28 cites·30 claims
- 0398US7825455B2Three terminal nonvolatile memory device with vertical gated diodeSANDISK 3D LLC·Filed 2009·Granted Nov 2, 2010·55 cites·18 claims
- 0496US8796098B1Embedded SONOS based memory cellsCYPRESS SEMICONDUCTOR CORP·Filed 2013·Granted Aug 5, 2014·19 cites·20 claims
- 0595US9171857B2Dense arrays and charge storage devicesSANDISK 3D LLC·Filed 2014·Granted Oct 27, 2015·8 cites·21 claims
- 0695US8093128B2Integration of non-volatile charge trap memory devices and logic CMOS devicesKOUTNY JR WILLIAM W C·Filed 2008·Granted Jan 10, 2012·89 cites·14 claims
- 0794US8953380B1Systems, methods, and apparatus for memory cells with common source linesCYPRESS SEMICONDUCTOR CORP·Filed 2014·Granted Feb 10, 2015·14 cites·20 claims
- 0893US7969804B1Memory architecture having a reference current generator that provides two reference currentsCYPRESS SEMICONDUCTOR CORP·Filed 2008·Granted Jun 28, 2011·25 cites·18 claims
- 0993US6897514B2Two mask floating gate EEPROM and method of makingMATRIX SEMICONDUCTOR INC·Filed 2002·Granted May 24, 2005·69 cites·17 claims
- 1093US6704235B2Anti-fuse memory cell with asymmetric breakdown voltageMATRIX SEMICONDUCTOR INC·Filed 2001·Granted Mar 9, 2004·81 cites·39 claims
- 1192US8675405B1Method to reduce program disturbs in non-volatile memory cellsCYPRESS SEMICONDUCTOR CORP·Filed 2013·Granted Mar 18, 2014·11 cites·15 claims
- 1289US10062573B1Embedded SONOS with triple gate oxide and manufacturing method of the sameCYPRESS SEMICONDUCTOR CORP·Filed 2017·Granted Aug 28, 2018·4 cites·10 claims
- 1389US9431124B2Method to reduce program disturbs in non-volatile memory cellsCYPRESS SEMICONDUCTOR CORP·Filed 2015·Granted Aug 30, 2016·7 cites·20 claims
- 1488US8542541B2Memory architecture having two independently controlled voltage pumpsHIROSE RYAN T·Filed 2012·Granted Sep 24, 2013·9 cites·17 claims
- 1587US8125835B2Memory architecture having two independently controlled voltage pumpsHIROSE RYAN T·Filed 2008·Granted Feb 28, 2012·13 cites·15 claims
- 1686US9356035B2Embedded SONOS based memory cellsCYPRESS SEMICONDUCTOR CORP·Filed 2014·Granted May 31, 2016·5 cites·20 claims
- 1785US9123642B1Method of forming drain extended MOS transistors for high voltage circuitsCYPRESS SEMICONDUCTOR CORP·Filed 2013·Granted Sep 1, 2015·5 cites·16 claims
- 1885US8988938B2Method to reduce program disturbs in non-volatile memory cellsCYPRESS SEMICONDUCTOR CORP·Filed 2014·Granted Mar 24, 2015·6 cites·20 claims
- 1983US10644021B2Dense arrays and charge storage devicesSANDISK TECHNOLOGIES LLC·Filed 2018·Granted May 5, 2020·2 cites·20 claims
- 2080US10217639B1Method of forming drain extended MOS transistors for high voltage circuitsCYPRESS SEMICONDUCTOR CORP·Filed 2015·Granted Feb 26, 2019·2 cites·17 claims
- 2180US7615436B2Two mask floating gate EEPROM and method of makingSANDISK 3D LLC·Filed 2004·Granted Nov 10, 2009·23 cites·42 claims
- 2278US9466374B2Systems, methods, and apparatus for memory cells with common source linesCYPRESS SEMICONDUCTOR CORP·Filed 2015·Granted Oct 11, 2016·3 cites·20 claims
- 2376US9361994B1Method of increasing read current window in non-volatile memoryCYPRESS SEMICONDUCTOR CORP·Filed 2015·Granted Jun 7, 2016·4 cites·18 claims
- 2475US9922988B2Embedded SONOS based memory cellsCYPRESS SEMICONDUCTOR CORP·Filed 2017·Granted Mar 20, 2018·1 cites·20 claims
- 2574US10002878B2Complementary SONOS integration into CMOS flowCYPRESS SEMICONDUCTOR CORP·Filed 2017·Granted Jun 19, 2018·1 cites·17 claims
- 2673US9847137B2Method to reduce program disturbs in non-volatile memory cellsCYPRESS SEMICONDUCTOR CORP·Filed 2016·Granted Dec 19, 2017·2 cites·20 claims
- 2773US9620516B2Embedded SONOS based memory cellsCYPRESS SEMICONDUCTOR CORP·Filed 2016·Granted Apr 11, 2017·1 cites·20 claims
- 2873US9355725B2Non-volatile memory and method of operating the sameCYPRESS SEMICONDUCTOR CORP·Filed 2014·Granted May 31, 2016·4 cites·11 claims
- 2972US10032517B2Memory architecture having two independently controlled voltage pumpsCYPRESS SEMICONDUCTOR CORP·Filed 2015·Granted Jul 24, 2018·2 cites·14 claims
- 3071US9704585B2High voltage architecture for non-volatile memoryCYPRESS SEMICONDUCTOR CORP·Filed 2015·Granted Jul 11, 2017·3 cites·9 claims
- 3168US10262747B2Method to reduce program disturbs in non-volatile memory cellsCYPRESS SEMICONDUCTOR CORP·Filed 2017·Granted Apr 16, 2019·2 cites·20 claims
- 3267US6531366B1Method and structure for high-voltage device with self-aligned graded junctionsCYPRESS SEMICONDUCTOR CORP·Filed 2001·Granted Mar 11, 2003·13 cites·20 claims
- 3365US2021074821A1Embedded sonos with triple gate oxide and manufacturing method of the sameLongitude Flash Memory Solutions Ltd·Filed 2020·Application pending·0 cites
- 3461US10784356B2Embedded sonos with triple gate oxide and manufacturing method of the sameLongitude Flash Memory Solutions Ltd·Filed 2018·Granted Sep 22, 2020·0 cites·16 claims
- 3558US2019355583A1Method of forming drain extended mos transistors for high voltage circuitsLongitude Flash Memory Solutions Ltd·Filed 2019·Application pending·0 cites
- 3654US2015200295A1Drain Extended MOS Transistors With Split ChannelCYPRESS SEMICONDUCTOR CORP·Filed 2014·Application pending·0 cites
- 3753US9997528B2Complimentary SONOS integration into CMOS flowCYPRESS SEMICONDUTOR CORP·Filed 2016·Granted Jun 12, 2018·0 cites·21 claims
- 3853US2019318785A1Systems, methods, and apparatus for memory cells with common source linesLongitude Flash Memory Solutions Ltd·Filed 2019·Application pending·0 cites
- 3953US2015171104A1Complementary sonos integration into cmos flowCYPRESS SEMICONDUCTOR CORP·Filed 2014·Application pending·0 cites
- 4052US10192622B2Systems, methods, and apparatus for memory cells with common source linesCYPRESS SEMICONDUCTOR CORP·Filed 2017·Granted Jan 29, 2019·0 cites·20 claims
- 4151US9818484B2Systems, methods, and apparatus for memory cells with common source linesCYPRESS SEMICONDUCTOR CORP·Filed 2017·Granted Nov 14, 2017·0 cites·5 claims
- 4250US10103244B2Drain extended MOS transistors with split channelCYPRESS SEMICONDUCTOR CORP·Filed 2016·Granted Oct 16, 2018·0 cites·16 claims
- 4350US9627073B2Systems, methods, and apparatus for memory cells with common source linesCYPRESS SEMICONDUCTOR CORP·Filed 2016·Granted Apr 18, 2017·0 cites·5 claims
- 4449US10373688B2High voltage architecture for non-volatile memoryCYPRESS SEMICONDUCTOR CORP·Filed 2017·Granted Aug 6, 2019·0 cites·18 claims
- 4548US9899089B1Memory architecture having two independently controlled voltage pumpsCYPRESS SEMICONDUCTOR CORP·Filed 2013·Granted Feb 20, 2018·0 cites·17 claims
- 4646US2020066352A1High voltage architecture for non-volatile memoryLongitude Flash Memory Solutions Ltd·Filed 2019·Application pending·0 cites
- 4736US2003026157A1Anti-fuse memory cell with asymmetric breakdown voltageFiled 2001·Application pending·0 cites
- 4834US2003155582A1Gate dielectric structures for integrated circuits and methods for making and using such gate dielectric structuresFiled 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →