Inventor · disambiguated record
Douglas Butler
Also filed as: BUTLER DOUGLAS · BUTLER DOUGLAS B · BUTLER DOUGLAS BLAINE
28 granted patents·11 pending applications·708 citations·filing 1979–2008
97Inventor score
Top patents by PatentIndex Score
39 records- 0194US6815941B2Bandgap reference circuitUNITED MEMORIES INC·Filed 2003·Granted Nov 9, 2004·62 cites·20 claims
- 0294US6392304B1Multi-chip memory apparatus and associated methodUNITED MEMORIES INC·Filed 1998·Granted May 21, 2002·136 cites·11 claims
- 0389US4893272AFerroelectric retention methodRAMTRON CORP·Filed 1988·Granted Jan 9, 1990·63 cites·6 claims
- 0487US5315230ATemperature compensated voltage reference for low and wide voltage rangesUNITED MEMORIES INC·Filed 1992·Granted May 24, 1994·52 cites·19 claims
- 0583US7002874B1Dual word line mode for DRAMsSONY CORP·Filed 2005·Granted Feb 21, 2006·14 cites·20 claims
- 0682US6518829B2Driver timing and circuit technique for a low noise charge pump circuitUNITED MEMORIES INC·Filed 2000·Granted Feb 11, 2003·42 cites·24 claims
- 0778US5043790ASealed self aligned contacts using two nitrides processRAMTRON CORP·Filed 1990·Granted Aug 27, 1991·44 cites·20 claims
- 0873US5162890AStacked capacitor with sidewall insulationRAMTRON CORP·Filed 1991·Granted Nov 10, 1992·30 cites·19 claims
- 0973US5104822AMethod for creating self-aligned, non-patterned contact areas and stacked capacitors using the methodRAMTRON CORP·Filed 1990·Granted Apr 14, 1992·31 cites·19 claims
- 1069US4679170AResistor with low thermal activation energyINMOS CORP·Filed 1985·Granted Jul 7, 1987·37 cites·15 claims
- 1169US4560419AMethod of making polysilicon resistors with a low thermal activation energyINMOS CORP·Filed 1984·Granted Dec 24, 1985·30 cites·21 claims
- 1268US7515494B2Refresh period adjustment technique for dynamic random access memories (DRAM) and integrated circuit devices incorporating embedded DRAMPROMOS TECHNOLOGIES PTE LTD·Filed 2006·Granted Apr 7, 2009·6 cites·11 claims
- 1367US6337278B1Technique for forming a borderless overlapping gate and diffusion contact structure in integrated circuit device processingMOSEL VITELIC INC·Filed 2000·Granted Jan 8, 2002·15 cites·7 claims
- 1465US4235011ASemiconductor apparatusHONEYWELL INC·Filed 1979·Granted Nov 25, 1980·23 cites·9 claims
- 1564US7099234B2Low power sleep mode operation technique for dynamic random access memory (DRAM) devices and integrated circuit devices incorporating embedded DRAMSONY CORP·Filed 2004·Granted Aug 29, 2006·12 cites·25 claims
- 1664US6912168B2Non-contiguous masked refresh for an integrated circuit memorySONY CORP·Filed 2003·Granted Jun 28, 2005·12 cites·20 claims
- 1764US5385634ASealed self aligned contact processRAMTRON INT CORP·Filed 1993·Granted Jan 31, 1995·21 cites·22 claims
- 1859US7583110B2High-speed, low-power input buffer for integrated circuit devicesPROMOS TECHNOLOGIES PTE LTD·Filed 2007·Granted Sep 1, 2009·3 cites·1 claims
- 1959US7506100B2Static random access memory (SRAM) compatible, high availability memory array and method employing synchronous dynamic random access memory (DRAM) in conjunction with a data cache and separate read and write registers and tag blocksUNITED MEMORIES INC·Filed 2005·Granted Mar 17, 2009·3 cites·19 claims
- 2056US5680362ACircuit and method for accessing memory cells of a memory deviceUNITED MEMORIES INC·Filed 1996·Granted Oct 21, 1997·31 cites·22 claims
- 2155US7609570B2Switched capacitor charge sharing technique for integrated circuit devices enabling signal generation of disparate selected signal valuesUNITED MEMORIES INC·Filed 2007·Granted Oct 27, 2009·3 cites·38 claims
- 2253US7250795B2High-speed, low-power input buffer for integrated circuit devicesPROMOS TECHNOLOGIES PTE LTD·Filed 2005·Granted Jul 31, 2007·2 cites·16 claims
- 2348US5216281ASelf sealed aligned contact incorporating a dopant sourceRAMTRON CORP·Filed 1991·Granted Jun 1, 1993·13 cites·14 claims
- 2448US2008268646A1Reduced area dynamic random access memory (dram) cell and method for fabricating the samePROMOS TECHNOLOGIES PET LTD·Filed 2008·Application pending·0 cites
- 2545US6317007B1Delayed start oscillator circuitUNITED MEMEORIES INC·Filed 2000·Granted Nov 13, 2001·5 cites·10 claims
- 2645US5075817ATrench capacitor for large scale integrated memoryRAMTRON CORP·Filed 1990·Granted Dec 24, 1991·10 cites·56 claims
- 2743US7110306B2Dual access DRAMSONY CORP·Filed 2004·Granted Sep 19, 2006·3 cites·19 claims
- 2843US2007085152A1Reduced area dynamic random access memory (DRAM) cell and method for fabricating the samePROMOS TECHNOLOGIES PTE LTD SI·Filed 2005·Application pending·0 cites
- 2943US2006005053A1Cache and tag power-down function during low-power data retention standby mode technique for cached integrated circuit memory devicesJONES OSCAR F JR·Filed 2004·Application pending·0 cites
- 3042US2009106488A1Static random access memory (sram) compatible, high availability memory array and method employing synchronous dynamic random access memory (dram) in conjunction with a data cache and separate read and write registers and tag blocksUNITED MEMORIES INC·Filed 2008·Application pending·0 cites
- 3140US2006229839A1Temperature sensing and monitoring technique for integrated circuit devicesCOLORADO SONY CORP TOKYO·Filed 2005·Application pending·0 cites
- 3239US2007121414A1Shielded bitline architecture for dynamic random access memory (dram) arraysPROMOS TECHNOLOGIES PTE LTD·Filed 2007·Application pending·0 cites
- 3338US7916567B2Twin cell architecture for integrated circuit dynamic random access memory (DRAM) devices and those devices incorporating embedded DRAMPROMOS TECHNOLOGIES PTE LTD·Filed 2008·Granted Mar 29, 2011·0 cites·33 claims
- 3438US2007058468A1Shielded bitline architecture for dynamic random access memory (DRAM) arraysPROMOS TECHNOLOGIES PTE LTD SI·Filed 2005·Application pending·0 cites
- 3538US2001040281A1Multi-chip memory apparatus and associated methodFiled 2001·Application pending·0 cites
- 3635US5811864APlanarized integrated circuit product and method for making itUNITED MEMORIES INC·Filed 1996·Granted Sep 22, 1998·5 cites·3 claims
- 3734US2005052219A1Integrated circuit transistor body bias regulation circuit and method for low voltage applicationsFiled 2004·Application pending·0 cites
- 3832US2005289293A1Dual-port DRAM cell with simultaneous accessPARRIS MICHAEL C·Filed 2004·Application pending·0 cites
- 3932US2006190678A1Static random access memory (SRAM) compatible, high availability memory array and method employing synchronous dynamic random access memory (DRAM) in conjunction with a single DRAM cache and tagBUTLER DOUGLAS B·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →