Inventor · disambiguated record
Lisa F. Edge
Also filed as: EDGE LISA · EDGE LISA F
20 granted patents·12 pending applications·149 citations·filing 2006–2020
94Inventor score
Top patents by PatentIndex Score
32 records- 0198US9490255B1Complementary metal oxide semiconductor replacement gate high-k metal gate devices with work function adjustmentsIBM·Filed 2015·Granted Nov 8, 2016·25 cites·20 claims
- 0295US9406679B2Integration of multiple threshold voltage devices for complementary metal oxide semiconductor using full metal gateIBM·Filed 2015·Granted Aug 2, 2016·10 cites·9 claims
- 0395US8232607B2Borderless contact for replacement gate employing selective depositionEDGE LISA F·Filed 2010·Granted Jul 31, 2012·42 cites·20 claims
- 0494US9502420B1Structure and method for highly strained germanium channel fins for high mobility pFINFETsIBM·Filed 2015·Granted Nov 22, 2016·10 cites·17 claims
- 0594US8309447B2Method for integrating multiple threshold voltage devices for CMOSCHENG KANGGUO·Filed 2010·Granted Nov 13, 2012·21 cites·27 claims
- 0691US8304836B2Structure and method to obtain EOT scaled dielectric stacksJAGANNATHAN HEMANTH·Filed 2009·Granted Nov 6, 2012·10 cites·18 claims
- 0787US7790628B2Method of forming high dielectric constant films using a plurality of oxidation sourcesTOKYO ELECTRON LTD·Filed 2007·Granted Sep 7, 2010·12 cites·17 claims
- 0886US10304746B2Complementary metal oxide semiconductor replacement gate high-K metal gate devices with work function adjustmentsIBM·Filed 2016·Granted May 28, 2019·3 cites·10 claims
- 0984US8796128B2Dual metal fill and dual threshold voltage for replacement gate metal devicesEDGE LISA F·Filed 2012·Granted Aug 5, 2014·9 cites·13 claims
- 1078US9059314B2Structure and method to obtain EOT scaled dielectric stacksJAGANNATHAN HEMANTH·Filed 2012·Granted Jun 16, 2015·2 cites·13 claims
- 1170US10930566B2Complementary metal oxide semiconductor replacement gate high-k metal gate devices with work function adjustmentsIBM·Filed 2020·Granted Feb 23, 2021·0 cites·20 claims
- 1267US9490161B2Channel SiGe devices with multiple threshold voltages on hybrid oriented substrates, and methods of manufacturing sameIBM·Filed 2014·Granted Nov 8, 2016·1 cites·6 claims
- 1367US9006816B2Memory device having multiple dielectric gate stacks and related methodsST MICROELECTRONICS INC·Filed 2013·Granted Apr 14, 2015·2 cites·14 claims
- 1464US10573565B2Complementary metal oxide semiconductor replacement gate high-k metal gate devices with work function adjustmentsIBM·Filed 2019·Granted Feb 25, 2020·0 cites·18 claims
- 1561US9093558B2Integration of multiple threshold voltage devices for complementary metal oxide semiconductor using full metal gateEDGE LISA F·Filed 2012·Granted Jul 28, 2015·1 cites·12 claims
- 1657US8232179B2Method to improve wet etch budget in FEOL integrationCUMMINGS JASON E·Filed 2009·Granted Jul 31, 2012·1 cites·14 claims
- 1757US2015279937A1Structure and method to obtain eot scaled dielectric stacksIBM·Filed 2015·Application pending·0 cites
- 1857US2015279746A1Structure and method to obtain eot scaled dielectric stacksIBM·Filed 2015·Application pending·0 cites
- 1957US2015311127A1Structure and method to obtain eot scaled dielectric stacksIBM·Filed 2015·Application pending·0 cites
- 2057US2015311303A1Structure and method to obtain eot scaled dielectric stacksIBM·Filed 2015·Application pending·0 cites
- 2150US10312259B2Channel SiGe devices with multiple threshold voltages on hybrid oriented substrates, and methods of manufacturing sameIBM·Filed 2016·Granted Jun 4, 2019·0 cites·12 claims
- 2249US2014084382A1Dual metal fill and dual threshold voltage for replacement gate metal devicesIBM·Filed 2013·Application pending·0 cites
- 2346US8679941B2Method to improve wet etch budget in FEOL integrationCUMMINGS JASON E·Filed 2012·Granted Mar 25, 2014·0 cites·9 claims
- 2445US10139358B2Method for characterization of a layered structureIBM·Filed 2016·Granted Nov 27, 2018·0 cites·20 claims
- 2545US8860123B1Memory device having multiple dielectric gate stacks with first and second dielectric layers and related methodsST MICROELECTRONICS INC·Filed 2013·Granted Oct 14, 2014·0 cites·21 claims
- 2644US2009072355A1Dual shallow trench isolation structureIBM·Filed 2007·Application pending·0 cites
- 2744US2012292706A1Scheme to enable robust integration of band edge devices and alternative channelsEDGE LISA F·Filed 2012·Application pending·0 cites
- 2841US2011303981A1Scheme to Enable Robust Integration of Band Edge Devices and Alternatives ChannelsEDGE LISA F·Filed 2010·Application pending·0 cites
- 2940US2007267671A1Trench capacitor having lateral extensions in only one direction and related methodsIBM·Filed 2006·Application pending·0 cites
- 3040US2014162447A1Finfet hybrid full metal gate with borderless contactsIBM·Filed 2012·Application pending·0 cites
- 3139US2012305940A1Defect Free Si:C Epitaxial GrowthADAM THOMAS N·Filed 2011·Application pending·0 cites
- 3232US2016343806A1Interface passivation layers and methods of fabricatingGLOBALFOUNDRIES INC·Filed 2015·Application pending·0 cites
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