Inventor · disambiguated record
Vernon R. Norman
Also filed as: NORMAN VERNON R · NORMAN VERNON ROBERTS
37 granted patents·4 pending applications·485 citations·filing 1985–2009
98Inventor score
Top patents by PatentIndex Score
41 records- 0193US7418069B2Clock data recovering system with external early/late inputIBM·Filed 2007·Granted Aug 26, 2008·23 cites·20 claims
- 0292US7397876B2Methods and arrangements for link power reductionIBM·Filed 2004·Granted Jul 8, 2008·44 cites·7 claims
- 0391US7149269B2Receiver for clock and data recovery and method for calibrating sampling phases in a receiver for clock and data recoveryIBM·Filed 2003·Granted Dec 12, 2006·50 cites·16 claims
- 0486US7368902B2Impedance calibration for source series terminated serial link transmitterIBM·Filed 2005·Granted May 6, 2008·12 cites·10 claims
- 0585US7809054B2One-sample-per-bit decision feedback equalizer (DFE) clock and data recoveryIBM·Filed 2006·Granted Oct 5, 2010·14 cites·12 claims
- 0685US7295604B2Method for determining jitter of a signal in a serial link and high speed serial linkIBM·Filed 2003·Granted Nov 13, 2007·36 cites·16 claims
- 0784US7315594B2Clock data recovering system with external early/late inputIBM·Filed 2002·Granted Jan 1, 2008·26 cites·8 claims
- 0880US7570071B2Impedance calibration for source series terminated serial link transmitterIBM·Filed 2008·Granted Aug 4, 2009·8 cites·3 claims
- 0977US7142624B2Analog unidirectional serial link architectureIBM·Filed 2005·Granted Nov 28, 2006·7 cites·16 claims
- 1076US7418032B2Altering power consumption in communication links based on measured noiseIBM·Filed 2005·Granted Aug 26, 2008·5 cites·8 claims
- 1174US7512177B2Method and apparatus for generating random jitterIBM·Filed 2007·Granted Mar 31, 2009·4 cites·17 claims
- 1272US4748588AFast data synchronizerIBM·Filed 1985·Granted May 31, 1988·38 cites·13 claims
- 1369US7698802B2Method for manufacturing a calibration deviceIBM·Filed 2008·Granted Apr 20, 2010·4 cites·7 claims
- 1468US6999544B2Apparatus and method for oversampling with evenly spaced samplesIBM·Filed 2001·Granted Feb 14, 2006·11 cites·19 claims
- 1566US7042277B2Circuit and method for reducing jitter in a PLL of high speed serial linksIBM·Filed 2003·Granted May 9, 2006·13 cites·20 claims
- 1666US4932023AFrame stripping protocol for early token release in a ring communication networkIBM·Filed 1989·Granted Jun 5, 1990·29 cites·31 claims
- 1764US8130887B2Method and arrangements for link power reductionCRANFORD JR HAYDEN CLAVIE·Filed 2008·Granted Mar 6, 2012·5 cites·14 claims
- 1864US7279950B2Method and system for high frequency clock signal gatingIBM·Filed 2005·Granted Oct 9, 2007·3 cites·12 claims
- 1963US6993107B2Analog unidirectional serial link architectureIBM·Filed 2001·Granted Jan 31, 2006·11 cites·18 claims
- 2058US7567614B2Altering power consumption in communication links based on measured noiseIBM·Filed 2008·Granted Jul 28, 2009·1 cites·12 claims
- 2158US6977558B2Self-adaptive voltage regulator for a phase-locked loopIBM·Filed 2003·Granted Dec 20, 2005·10 cites·13 claims
- 2257US7082484B2Architecture for advanced serial link between two cardsIBM·Filed 2001·Granted Jul 25, 2006·5 cites·20 claims
- 2356US7349498B2Method and system for data and edge detection with correlation tablesIBM·Filed 2002·Granted Mar 25, 2008·3 cites·8 claims
- 2453US7661052B2Using statistical signatures for testing high-speed circuitsIBM·Filed 2008·Granted Feb 9, 2010·1 cites·9 claims
- 2553US6970529B2Unified digital architectureIBM·Filed 2001·Granted Nov 29, 2005·6 cites·3 claims
- 2652US5717855ASegmented communications adapter with packet transfer interfaceIBM·Filed 1996·Granted Feb 10, 1998·28 cites·10 claims
- 2751US5442629AToken ring speed detectorIBM·Filed 1994·Granted Aug 15, 1995·25 cites·20 claims
- 2851US2009116593A1Circuit for providing automatic adaptation to frequency offsets in high speed serial linksIBM·Filed 2009·Application pending·0 cites
- 2950US7646839B2Unified digital architectureIBM·Filed 2005·Granted Jan 12, 2010·0 cites·16 claims
- 3050US7539473B2Overshoot reduction in VCO calibration for serial link phase lock loop (PLL)IBM·Filed 2006·Granted May 26, 2009·2 cites·8 claims
- 3149US2007279117A1Method and system for high frequency clock signal gatingIBM·Filed 2007·Application pending·0 cites
- 3247US7477713B2method for providing automatic adaptation to frequency offsets in high speed serial linksIBM·Filed 2004·Granted Jan 13, 2009·0 cites·12 claims
- 3347US5537623AMultiple group address recognitionIBM·Filed 1993·Granted Jul 16, 1996·26 cites·16 claims
- 3447US2008240224A1Structure for one-sample-per-bit decision feedback equalizer (dfe) clock and data recoveryCARBALLO JUAN A·Filed 2008·Application pending·0 cites
- 3545US7317777B2Digital adaptive control loop for data deserializationIBM·Filed 2002·Granted Jan 8, 2008·4 cites·2 claims
- 3645US5142530AMulti-frame stripping protocol for token ring networksIBM·Filed 1989·Granted Aug 25, 1992·12 cites·25 claims
- 3743US5719864ALogical channel resolution in asynchronous transmission mode communication systemsIBM·Filed 1995·Granted Feb 17, 1998·18 cites·16 claims
- 3840US7340660B2Method and system for using statistical signatures for testing high-speed circuitsIBM·Filed 2003·Granted Mar 4, 2008·0 cites·14 claims
- 3940US7089132B2Method and system for providing quality control on wafers running on a manufacturing lineIBM·Filed 2004·Granted Aug 8, 2006·0 cites·13 claims
- 4035US7085970B2Fast detection of incorrect sampling in an oversampling clock and data recovery systemIBM·Filed 2002·Granted Aug 1, 2006·1 cites·5 claims
- 4132US2007047589A1Multi-rate SERDES receiverMODARESS-RAZAVI BOBAK·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →