Inventor · disambiguated record
Zhao Lun
Also filed as: LUN ZHAO
21 granted patents·3 pending applications·107 citations·filing 2003–2015
93Inventor score
Files withCHARTERED SEMICONDUCTOR MFG8GLOBALFOUNDRIES INC6GLOBALFOUNDRIES SG PTE LTD3IBM2TEO LEE WEE2
Top patents by PatentIndex Score
24 records- 0195US9419101B1Multi-layer spacer used in finFETGLOBALFOUNDRIES INC·Filed 2015·Granted Aug 16, 2016·20 cites·20 claims
- 0295US9337306B2Multi-phase source/drain/gate spacer-epi formationGLOBALFOUNDRIES INC·Filed 2014·Granted May 10, 2016·26 cites·16 claims
- 0389US7485524B2MOSFETs comprising source/drain regions with slanted upper surfaces, and method for fabricating the sameIBM·Filed 2006·Granted Feb 3, 2009·17 cites·1 claims
- 0480US6998682B2Method of forming a partially depleted silicon on insulator (PDSOI) transistor with a pad lock body extensionCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted Feb 14, 2006·9 cites·22 claims
- 0576US8987083B1Uniform gate height for semiconductor structure with N and P type finsGLOBALFOUNDRIES INC·Filed 2014·Granted Mar 24, 2015·4 cites·10 claims
- 0671US9362176B2Uniform exposed raised structures for non-planar semiconductor devicesGLOBALFOUNDRIES INC·Filed 2014·Granted Jun 7, 2016·2 cites·4 claims
- 0769US8716081B2Capacitor top plate over source/drain to form a 1T memory deviceTEO LEE WEE·Filed 2007·Granted May 6, 2014·4 cites·29 claims
- 0869US8274115B2Hybrid orientation substrate with stress layerTEO LEE WEE·Filed 2008·Granted Sep 25, 2012·4 cites·16 claims
- 0968US7838390B2Methods of forming integrated circuit devices having ion-cured electrically insulating layers thereinSAMSUNG ELECTRONICS CO LTD·Filed 2007·Granted Nov 23, 2010·4 cites·7 claims
- 1066US8178417B2Method of forming shallow trench isolation structures for integrated circuitsMISHRA SHAILENDRA·Filed 2008·Granted May 15, 2012·4 cites·23 claims
- 1166US8053327B2Method of manufacture of an integrated circuit system with self-aligned isolation structuresGLOBALFOUNDRIES SG PTE LTD·Filed 2006·Granted Nov 8, 2011·3 cites·10 claims
- 1263US9059218B2Reducing gate expansion after source and drain implant in gate last processGLOBALFOUNDRIES INC·Filed 2013·Granted Jun 16, 2015·1 cites·6 claims
- 1359US6905919B2Method of forming a partially depleted silicon on insulator (PDSOI) transistor with a pad lock body extensionCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Jun 14, 2005·8 cites·22 claims
- 1450US7767577B2Nested and isolated transistors with reduced impedance differenceCHARTERED SEMICONDUCTOR MFG·Filed 2008·Granted Aug 3, 2010·0 cites·18 claims
- 1549US9431528B2Lithographic stack excluding SiARC and method of using sameGLOBALFOUNDRIES INC·Filed 2014·Granted Aug 30, 2016·0 cites·8 claims
- 1648US7795680B2Integrated circuit system employing selective epitaxial growth technologyCHARTERED SEMICONDUCTOR MFG·Filed 2007·Granted Sep 14, 2010·0 cites·20 claims
- 1748US2008087958A1Semiconductor device with doped transistorCHARTERED SEMICONDUCTOR MFG·Filed 2007·Application pending·0 cites
- 1847US7999300B2Memory cell structure and method for fabrication thereofGLOBALFOUNDRIES SG PTE LTD·Filed 2009·Granted Aug 16, 2011·0 cites·22 claims
- 1947US2010009527A1Integrated circuit system employing single mask layer technique for well formationCHARTERED SEMICONDUCTOR MFG·Filed 2008·Application pending·0 cites
- 2046US7326609B2Semiconductor device and fabrication methodCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted Feb 5, 2008·0 cites·10 claims
- 2142US7259072B2Shallow low energy ion implantation into pad oxide for improving threshold voltage stabilityCHARTERED SEMICONDUCTOR MFG·Filed 2004·Granted Aug 21, 2007·1 cites·16 claims
- 2242US2007293016A1Semiconductor structure including isolation region with variable linewidth and method for fabrication therofIBM·Filed 2006·Application pending·0 cites
- 2341US8143651B2Nested and isolated transistors with reduced impedance differenceWIDODO JOHNNY·Filed 2010·Granted Mar 27, 2012·0 cites·19 claims
- 2441US7932178B2Integrated circuit having a plurality of MOSFET devicesGLOBALFOUNDRIES SG PTE LTD·Filed 2006·Granted Apr 26, 2011·0 cites·6 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →