Inventor · disambiguated record
Richard F. Indyk
Also filed as: INDYK RICHARD · INDYK RICHARD F · INDYK RICHARD FRANCIS
30 granted patents·3 pending applications·429 citations·filing 1986–2021
97Inventor score
Top patents by PatentIndex Score
33 records- 0194US9607973B1Method for establishing interconnects in packages using thin interposersGLOBALFOUNDRIES INC·Filed 2015·Granted Mar 28, 2017·10 cites·10 claims
- 0293US7724527B2Method and structure to improve thermal dissipation from semiconductor devicesIBM·Filed 2008·Granted May 25, 2010·24 cites·20 claims
- 0392US7468886B2Method and structure to improve thermal dissipation from semiconductor devicesIBM·Filed 2007·Granted Dec 23, 2008·21 cites·1 claims
- 0490US10002835B2Structure for establishing interconnects in packages using thin interposersGLOBALFOUNDRIES INC·Filed 2017·Granted Jun 19, 2018·6 cites·8 claims
- 0589US6136419ACeramic substrate having a sealed layerIBM·Filed 1999·Granted Oct 24, 2000·74 cites·29 claims
- 0687US10090255B2Dicing channels for glass interposersGLOBALFOUNDRIES INC·Filed 2016·Granted Oct 2, 2018·6 cites·20 claims
- 0787US6312791B1Multilayer ceramic substrate with anchored padIBM·Filed 2000·Granted Nov 6, 2001·36 cites·19 claims
- 0887US6139666AMethod for producing ceramic surfaces with easily removable contact sheetsIBM·Filed 1999·Granted Oct 31, 2000·88 cites·7 claims
- 0983US8652941B2Wafer dicing employing edge region underfill removalINDYK RICHARD F·Filed 2012·Granted Feb 18, 2014·10 cites·25 claims
- 1080US6187418B1Multilayer ceramic substrate with anchored padIBM·Filed 1999·Granted Feb 13, 2001·40 cites·35 claims
- 1176US7897059B2High tin solder etching solutionIBM·Filed 2007·Granted Mar 1, 2011·4 cites·18 claims
- 1271US11410894B2Polygon integrated circuit (IC) packagingIBM·Filed 2019·Granted Aug 9, 2022·1 cites·8 claims
- 1371US11031373B2Spacer for die-to-die communication in an integrated circuitIBM·Filed 2019·Granted Jun 8, 2021·1 cites·18 claims
- 1467US11521952B2Spacer for die-to-die communication in an integrated circuit and method for fabricating the sameIBM·Filed 2021·Granted Dec 6, 2022·0 cites·20 claims
- 1562US7294909B2Electronic package repair processIBM·Filed 2005·Granted Nov 13, 2007·2 cites·14 claims
- 1662US6955543B2Method and apparatus to form a reworkable seal on an electronic moduleIBM·Filed 2003·Granted Oct 18, 2005·11 cites·24 claims
- 1753US6261927B1Method of forming defect-free ceramic structures using thermally depolymerizable surface layerIBM·Filed 1999·Granted Jul 17, 2001·16 cites·19 claims
- 1853US5700549AStructure to reduce stress in multilayer ceramic substratesIBM·Filed 1996·Granted Dec 23, 1997·16 cites·10 claims
- 1952US7087513B2Method to produce low strength temporary solder jointsIBM·Filed 2004·Granted Aug 8, 2006·3 cites·9 claims
- 2052US6258191B1Method and materials for increasing the strength of crystalline ceramicIBM·Filed 1998·Granted Jul 10, 2001·18 cites·7 claims
- 2150US5755903AMethod of making a multilayer ceramic substrate having reduced stressIBM·Filed 1996·Granted May 26, 1998·14 cites·9 claims
- 2249US2015001714A1Stress-resilient chip structure and dicing processIBM·Filed 2014·Application pending·0 cites
- 2348US6597058B1Method of forming defect-free ceramic structures using thermally depolymerizable surface layerIBM·Filed 1999·Granted Jul 22, 2003·12 cites·7 claims
- 2447US6823585B2Method of selective plating on a substrateIBM·Filed 2003·Granted Nov 30, 2004·2 cites·13 claims
- 2546US11031343B2Fins for enhanced die communicationIBM·Filed 2019·Granted Jun 8, 2021·0 cites·10 claims
- 2646US10211175B2Stress-resilient chip structure and dicing processIBM·Filed 2012·Granted Feb 19, 2019·0 cites·13 claims
- 2744US6916670B2Electronic package repair processIBM·Filed 2003·Granted Jul 12, 2005·1 cites·25 claims
- 2843US6835260B2Method to produce pedestal features in constrained sintered substratesIBM·Filed 2002·Granted Dec 28, 2004·1 cites·17 claims
- 2942US10134577B2Edge trim processes and resultant structuresIBM·Filed 2015·Granted Nov 20, 2018·0 cites·17 claims
- 3040US2007099346A1Surface treatments for underfill controlIBM·Filed 2005·Application pending·0 cites
- 3138US2006014309A1Temporary chip attach method using reworkable conductive adhesive interconnectionsSACHDEV KRISHNA G·Filed 2004·Application pending·0 cites
- 3235US6376054B1Surface metallization structure for multiple chip test and burn-inIBM·Filed 1999·Granted Apr 23, 2002·5 cites·22 claims
- 3332US4663186AScreenable paste for use as a barrier layer on a substrate during maskless claddingIBM·Filed 1986·Granted May 5, 1987·7 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →