Inventor · disambiguated record
Felix P. Anderson
Also filed as: ANDERSON FELIX · ANDERSON FELIX P · ANDERSON FELIX PATRICK
22 granted patents·4 pending applications·99 citations·filing 2007–2020
94Inventor score
Top patents by PatentIndex Score
26 records- 0195US8791778B2Vertical integrated circuit switches, design structure and methods of fabricating sameIBM·Filed 2013·Granted Jul 29, 2014·14 cites·9 claims
- 0293US8604898B2Vertical integrated circuit switches, design structure and methods of fabricating sameANDERSON FELIX P·Filed 2009·Granted Dec 10, 2013·23 cites·19 claims
- 0392US7538006B1Annular damascene vertical natural capacitorIBM·Filed 2008·Granted May 26, 2009·18 cites·1 claims
- 0488US7833907B2CMP methods avoiding edge erosion and related waferIBM·Filed 2008·Granted Nov 16, 2010·12 cites·19 claims
- 0586US8921975B2System and method for forming aluminum fuse for compatibility with copper BEOL interconnect schemeANDERSON FELIX P·Filed 2012·Granted Dec 30, 2014·8 cites·6 claims
- 0681US8569091B2Integrated circuit switches, design structure and methods of fabricating the sameANDERSON FELIX P·Filed 2009·Granted Oct 29, 2013·6 cites·9 claims
- 0780US8535966B2Horizontal coplanar switches and methods of manufactureANDERSON FELIX P·Filed 2010·Granted Sep 17, 2013·3 cites·18 claims
- 0876US9673091B2Structure for BEOL metal levels with multiple dielectric layers for improved dielectric to metal adhesionGLOBALFOUNDRIES INC·Filed 2015·Granted Jun 6, 2017·2 cites·11 claims
- 0973US8518817B2Method of electrolytic plating and semiconductor device fabricationANDERSON FELIX P·Filed 2010·Granted Aug 27, 2013·3 cites·25 claims
- 1068US8975531B2Composite copper wire interconnect structures and methods of formingIBM·Filed 2013·Granted Mar 10, 2015·2 cites·20 claims
- 1167US8137791B2Fuse and pad stress reliefANDERSON FELIX PATRICK·Filed 2007·Granted Mar 20, 2012·4 cites·18 claims
- 1265US9275951B2Curvilinear wiring structure to reduce areas of high field density in an integrated circuitGLOBALFOUNDRIES INC·Filed 2013·Granted Mar 1, 2016·1 cites·6 claims
- 1362US8927411B2System and method for forming an aluminum fuse for compatibility with copper BEOL interconnect schemeIBM·Filed 2013·Granted Jan 6, 2015·1 cites·5 claims
- 1460US8293634B2Structures and methods for improving solder bump connections in semiconductor devicesANDERSON FELIX P·Filed 2008·Granted Oct 23, 2012·1 cites·14 claims
- 1559US8530970B2Curvilinear wiring structure to reduce areas of high field density in an integrated circuitANDERSON FELIX PATRICK·Filed 2009·Granted Sep 10, 2013·1 cites·8 claims
- 1655US8878315B2Horizontal coplanar switches and methods of manufactureIBM·Filed 2013·Granted Nov 4, 2014·0 cites·11 claims
- 1754US8969195B2Methods of manufacturing semiconductor devices and a semiconductor structureANDERSON FELIX P·Filed 2008·Granted Mar 3, 2015·0 cites·24 claims
- 1853US9284185B2Integrated circuit switches, design structure and methods of fabricating the sameIBM·Filed 2013·Granted Mar 15, 2016·0 cites·16 claims
- 1952US11978661B2Ultralow-K dielectric-gap wrapped contacts and methodGLOBALFOUNDRIES US INC·Filed 2020·Granted May 7, 2024·0 cites·20 claims
- 2051US10163697B2Method for forming BEOL metal levels with multiple dielectric layers for improved dielectric to metal adhesionGLOBALFOUNDRIES INC·Filed 2017·Granted Dec 25, 2018·0 cites·14 claims
- 2148US2011127673A1Wiring structure and methodIBM·Filed 2009·Application pending·0 cites
- 2248US2012129336A1Structures and methods for improving solder bump connections in semiconductor devicesANDERSON FELIX P·Filed 2012·Application pending·0 cites
- 2347US8129844B2Method of forming a metal silicide layer, devices incorporating metal silicide layers and design structures for the devicesANDERSON FELIX PATRICK·Filed 2008·Granted Mar 6, 2012·0 cites·20 claims
- 2444US2015130064A1Methods of manufacturing semiconductor devices and a semiconductor structureIBM·Filed 2015·Application pending·0 cites
- 2542US7851353B2Method of forming a metal silicide layer, devices incorporating metal silicide layers and design structures for the devicesIBM·Filed 2008·Granted Dec 14, 2010·0 cites·10 claims
- 2637US2012261813A1Reinforced via farm interconnect structure, a method of forming a reinforced via farm interconnect structure and a method of redesigning an integrated circuit chip to include such a reinforced via farm interconnect structureANDERSON FELIX P·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →