Inventor · disambiguated record
Erik K. Norden
Also filed as: NORDEN ERIK · NORDEN ERIK K · NORDEN ERIK KARL
24 granted patents·12 pending applications·122 citations·filing 2001–2025
94Inventor score
Top patents by PatentIndex Score
36 records- 0190US11537838B2Scalable neural network processing engineAPPLE INC·Filed 2018·Granted Dec 27, 2022·7 cites·20 claims
- 0289US10346163B2Matrix computation engineAPPLE INC·Filed 2017·Granted Jul 9, 2019·7 cites·20 claims
- 0387US10877754B2Matrix computation engineAPPLE INC·Filed 2020·Granted Dec 29, 2020·2 cites·20 claims
- 0482US2025383912A1Systems and methods for task switching in neural network processorAPPLE INC·Filed 2025·Application pending·0 cites
- 0581US11487846B2Performing multiply and accumulate operations in neural network processorAPPLE INC·Filed 2018·Granted Nov 1, 2022·4 cites·20 claims
- 0681US2024265233A1Scalable neural network processing engineAPPLE INC·Filed 2024·Application pending·0 cites
- 0780US7263599B2Thread ID in a multithreaded processorINFINEON TECHNOLOGIES AG·Filed 2004·Granted Aug 28, 2007·31 cites·15 claims
- 0878US12393443B2Systems and methods for task switching in neural network processorAPPLE INC·Filed 2023·Granted Aug 19, 2025·0 cites·19 claims
- 0977US11989640B2Scalable neural network processing engineAPPLE INC·Filed 2022·Granted May 21, 2024·0 cites·20 claims
- 1077US7260707B2Variable length instruction pipelineINFINEON TECHNOLOGIES AG·Filed 2005·Granted Aug 21, 2007·7 cites·19 claims
- 1177US7062606B2Multi-threaded embedded processor using deterministic instruction memory to guarantee execution of pre-selected threads during blocking eventsINFINEON TECHNOLOGIES AG·Filed 2003·Granted Jun 13, 2006·23 cites·29 claims
- 1276US2025165747A1Scalable neural network processing engineAPPLE INC·Filed 2025·Application pending·0 cites
- 1374US6859873B2Variable length instruction pipelineINFINEON TECHNOLOGIES AG·Filed 2001·Granted Feb 22, 2005·17 cites·8 claims
- 1470US10592239B2Matrix computation engineAPPLE INC·Filed 2019·Granted Mar 17, 2020·1 cites·15 claims
- 1569US9928065B2Variable register and immediate field encoding in an instruction set architectureARM FINANCE OVERSEAS LTD·Filed 2016·Granted Mar 27, 2018·1 cites·18 claims
- 1668US2025165748A1Systems and methods for assigning tasks in a neural network processorAPPLE INC·Filed 2025·Application pending·0 cites
- 1763US12417047B2Heterogeneous ML accelerator cluster with flexible system resource balanceGOOGLE LLC·Filed 2023·Granted Sep 16, 2025·0 cites·20 claims
- 1862US7360203B2Program tracing in a multithreaded processorINFINEON TECHNOLOGIES AG·Filed 2004·Granted Apr 15, 2008·9 cites·30 claims
- 1960US10776114B2Variable register and immediate field encoding in an instruction set architectureARM FINANCE OVERSEAS LTD·Filed 2018·Granted Sep 15, 2020·0 cites·18 claims
- 2058US7222251B2Microprocessor idle mode management systemINFINEON TECHNOLOGIES AG·Filed 2003·Granted May 22, 2007·9 cites·10 claims
- 2155US7774585B2Interrupt and trap handling in an embedded multi-thread processor to avoid priority inversion and maintain real-time operationINFINEON TECHNOLOGIES AG·Filed 2003·Granted Aug 10, 2010·4 cites·40 claims
- 2254US11740932B2Systems and methods for task switching in neural network processorAPPLE INC·Filed 2018·Granted Aug 29, 2023·0 cites·20 claims
- 2352US12282838B2Systems and methods for assigning tasks in a neural network processorAPPLE INC·Filed 2018·Granted Apr 22, 2025·0 cites·20 claims
- 2450US9274796B2Variable register and immediate field encoding in an instruction set architectureNORDEN ERIK K·Filed 2009·Granted Mar 1, 2016·0 cites·70 claims
- 2549US2009282220A1Microprocessor with Compact Instruction Set ArchitectureMIPS TECH INC·Filed 2009·Application pending·0 cites
- 2649US2013159578A1System and method for Automatic Hardware Interrupt HandlingMIPS TECH INC·Filed 2013·Application pending·0 cites
- 2746US7296134B2Fast unaligned memory access system and methodINFINEON TECHNOLOGIES AG·Filed 2004·Granted Nov 13, 2007·0 cites·20 claims
- 2845US10970078B2Computation engine with upsize/interleave and downsize/deinterleave optionsAPPLE INC·Filed 2018·Granted Apr 6, 2021·0 cites·19 claims
- 2943US8392644B2System and method for automatic hardware interrupt handlingNORDEN ERIK K·Filed 2010·Granted Mar 5, 2013·0 cites·18 claims
- 3042US2006259742A1Controlling out of order execution pipelines using pipeline skew parametersINFINEON TECHNOLOGIES AG·Filed 2005·Application pending·0 cites
- 3142US2021064958A1Heterogeneously integrated optical neural network acceleratorINTEL CORP·Filed 2020·Application pending·0 cites
- 3242US2005198475A1Thread selection unit and method to fairly allocate processor cycles in a block multithreaded processorINFINEON TECHNOLOGIES INC·Filed 2004·Application pending·0 cites
- 3341US2002188817A1Store buffer pipelineFiled 2001·Application pending·0 cites
- 3438US12393824B2Methods and apparatus for a knowledge-based deep learning refactoring model with tightly integrated functional nonparametric memoryINTEL CORP·Filed 2021·Granted Aug 19, 2025·0 cites·24 claims
- 3538US2010312991A1Microprocessor with Compact Instruction Set ArchitectureMIPS TECH INC·Filed 2010·Application pending·0 cites
- 3633US2013058214A1Method and apparatus to avoid overloads on subscriber access linesFOGLAR ANDREAS·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →