Assignee
MIPS TECH INC
US·238 granted patents·36 pending applications·7,442 citations·filing 1993–2013
Top patents by PatentIndex Score
274 records- 0198US7177985B1Microprocessor with improved data stream prefetchingMIPS TECH INC·Filed 2003·Granted Feb 13, 2007·153 cites·57 claims
- 0297US7676660B2System, method, and computer program product for conditionally suspending issuing instructions of a threadMIPS TECH INC·Filed 2007·Granted Mar 9, 2010·41 cites·25 claims
- 0397US7321965B2Integrated mechanism for suspension and deallocation of computational threads of execution in a processorMIPS TECH INC·Filed 2004·Granted Jan 22, 2008·100 cites·82 claims
- 0497US5933650AAlignment and ordering of vector elements for single instruction multiple data processingMIPS TECH INC·Filed 1997·Granted Aug 3, 1999·352 cites·44 claims
- 0596US7055070B1Trace control block implementation and methodMIPS TECH INC·Filed 2001·Granted May 30, 2006·122 cites·27 claims
- 0695US7512740B2Microprocessor with improved data stream prefetchingMIPS TECH INC·Filed 2006·Granted Mar 31, 2009·31 cites·5 claims
- 0795US7418585B2Symmetric multiprocessor operating system for execution on non-independent lightweight thread contextsMIPS TECH INC·Filed 2006·Granted Aug 26, 2008·30 cites·44 claims
- 0895US7257814B1Method and apparatus for implementing atomicity of memory operations in dynamic multi-streaming processorsMIPS TECH INC·Filed 2000·Granted Aug 14, 2007·99 cites·11 claims
- 0995US7181484B2Extended-precision accumulation of multiplier outputMIPS TECH INC·Filed 2001·Granted Feb 20, 2007·101 cites·48 claims
- 1095US6754804B1Coprocessor interface transferring multiple instructions simultaneously along with issue path designation and/or issue order designation for the instructionsMIPS TECH INC·Filed 2000·Granted Jun 22, 2004·130 cites·25 claims
- 1195US5864703AMethod for providing extended precision in SIMD vector arithmetic operationsMIPS TECH INC·Filed 1997·Granted Jan 26, 1999·204 cites·40 claims
- 1294US7853777B2Instruction/skid buffers in a multithreading microprocessor that store dispatched instructions to avoid re-fetching flushed instructionsMIPS TECH INC·Filed 2005·Granted Dec 14, 2010·43 cites·38 claims
- 1394US7725697B2Symmetric multiprocessor operating system for execution on non-independent lightweight thread contextsMIPS TECH INC·Filed 2006·Granted May 25, 2010·25 cites·39 claims
- 1494US7617388B2Virtual instruction expansion using parameter selector defining logic operation on parameters for template opcode substitutionMIPS TECH INC·Filed 2006·Granted Nov 10, 2009·32 cites·22 claims
- 1594US7424599B2Apparatus, method, and instruction for software management of multiple computational contexts in a multithreaded microprocessorMIPS TECH INC·Filed 2004·Granted Sep 9, 2008·63 cites·57 claims
- 1694US7185234B1Trace control from hardware and softwareMIPS TECH INC·Filed 2001·Granted Feb 27, 2007·70 cites·14 claims
- 1794US6789100B2Interstream control and communications for multi-streaming digital processorsMIPS TECH INC·Filed 2002·Granted Sep 7, 2004·80 cites·3 claims
- 1893US7886150B2System debug and trace system and method, and applications thereofMIPS TECH INC·Filed 2007·Granted Feb 8, 2011·39 cites·19 claims
- 1993US7849297B2Software emulation of directed exceptions in a multithreading processorMIPS TECH INC·Filed 2005·Granted Dec 7, 2010·33 cites·68 claims
- 2093US7676664B2Symmetric multiprocessor operating system for execution on non-independent lightweight thread contextsMIPS TECH INC·Filed 2006·Granted Mar 9, 2010·22 cites·45 claims
- 2193US7490230B2Fetch director employing barrel-incrementer-based round-robin apparatus for use in multithreading microprocessorMIPS TECH INC·Filed 2005·Granted Feb 10, 2009·32 cites·37 claims
- 2293US7185183B1Atomic update of CPO stateMIPS TECH INC·Filed 2001·Granted Feb 27, 2007·96 cites·21 claims
- 2393US7149878B1Changing instruction set architecture mode by comparison of current instruction execution address with boundary address register valuesMIPS TECH INC·Filed 2000·Granted Dec 12, 2006·85 cites·36 claims
- 2493US7020879B1Interrupt and exception handling for multi-streaming digital processorsMIPS TECH INC·Filed 1999·Granted Mar 28, 2006·143 cites·23 claims
- 2593US6742165B2System, method and computer program product for web-based integrated circuit designMIPS TECH INC·Filed 2001·Granted May 25, 2004·108 cites·22 claims
- 2692US7770156B2Dynamic selection of a compression algorithm for trace dataMIPS TECH INC·Filed 2006·Granted Aug 3, 2010·23 cites·16 claims
- 2792US7752627B2Leaky-bucket thread scheduler in a multithreading microprocessorMIPS TECH INC·Filed 2005·Granted Jul 6, 2010·34 cites·39 claims
- 2892US7730291B2Symmetric multiprocessor operating system for execution on non-independent lightweight thread contextsMIPS TECH INC·Filed 2006·Granted Jun 1, 2010·21 cites·49 claims
- 2992US7694304B2Mechanisms for dynamic configuration of virtual processor resourcesMIPS TECH INC·Filed 2004·Granted Apr 6, 2010·50 cites·58 claims
- 3092US7634638B1Instruction encoding for system register bit set and clearMIPS TECH INC·Filed 2002·Granted Dec 15, 2009·61 cites·12 claims
- 3192US7627770B2Apparatus and method for automatic low power mode invocation in a multi-threaded processorMIPS TECH INC·Filed 2005·Granted Dec 1, 2009·27 cites·8 claims
- 3292US7610473B2Apparatus, method, and instruction for initiation of concurrent instruction streams in a multithreading microprocessorMIPS TECH INC·Filed 2004·Granted Oct 27, 2009·48 cites·47 claims
- 3392US7594079B2Data cache virtual hint way prediction, and applications thereofMIPS TECH INC·Filed 2006·Granted Sep 22, 2009·26 cites·22 claims
- 3492US7480769B2Microprocessor with improved data stream prefetchingMIPS TECH INC·Filed 2006·Granted Jan 20, 2009·25 cites·14 claims
- 3592US7467385B2Interrupt and exception handling for multi-streaming digital processorsMIPS TECH INC·Filed 2006·Granted Dec 16, 2008·20 cites·25 claims
- 3692US7376954B2Mechanisms for assuring quality of service for programs executing on a multithreaded processorMIPS TECH INC·Filed 2003·Granted May 20, 2008·77 cites·37 claims
- 3792US7197625B1Alignment and ordering of vector elements for single instruction multiple data processingMIPS TECH INC·Filed 2000·Granted Mar 27, 2007·61 cites·18 claims
- 3892US7032226B1Methods and apparatus for managing a buffer of events in the backgroundMIPS TECH INC·Filed 2000·Granted Apr 18, 2006·69 cites·24 claims
- 3992US6976178B1Method and apparatus for disassociating power consumed within a processing system with instructions it is executingMIPS TECH INC·Filed 2001·Granted Dec 13, 2005·64 cites·12 claims
- 4092US6625737B1System for prediction and control of power consumption in digital systemMIPS TECH INC·Filed 2000·Granted Sep 23, 2003·65 cites·40 claims
- 4192US6266758B1Alignment and ordering of vector elements for single instruction multiple data processingMIPS TECH INC·Filed 1999·Granted Jul 24, 2001·193 cites·13 claims
- 4291US7529915B2Context switching processor with multiple context control register sets including write address register identifying destination register for waiting context to store returned data from external sourceMIPS TECH INC·Filed 2006·Granted May 5, 2009·21 cites·10 claims
- 4391US7181600B1Read-only access to CPO registersMIPS TECH INC·Filed 2001·Granted Feb 20, 2007·73 cites·21 claims
- 4491US6651160B1Register set extension for compressed instruction setMIPS TECH INC·Filed 2000·Granted Nov 18, 2003·80 cites·22 claims
- 4590US7900207B2Interrupt and exception handling for multi-streaming digital processorsMIPS TECH INC·Filed 2008·Granted Mar 1, 2011·15 cites·22 claims
- 4690US7836450B2Symmetric multiprocessor operating system for execution on non-independent lightweight thread contextsMIPS TECH INC·Filed 2006·Granted Nov 16, 2010·20 cites·6 claims
- 4790US7747989B1Virtual machine coprocessor facilitating dynamic compilationMIPS TECH INC·Filed 2003·Granted Jun 29, 2010·44 cites·15 claims
- 4890US7664936B2Prioritizing thread selection partly based on stall likelihood providing status information of instruction operand register usage at pipeline stagesMIPS TECH INC·Filed 2005·Granted Feb 16, 2010·26 cites·72 claims
- 4990US7178133B1Trace control based on a characteristic of a processor's operating stateMIPS TECH INC·Filed 2001·Granted Feb 13, 2007·62 cites·13 claims
- 5090US6691221B2Loading previously dispatched slots in multiple instruction dispatch buffer before dispatching remaining slots for parallel executionMIPS TECH INC·Filed 2001·Granted Feb 10, 2004·52 cites·39 claims
Showing the top 50 of 274 patent records by PatentIndex Score.
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