Inventor · disambiguated record
Judith H. Mccullen
Also filed as: MCCULLEN JUDITH H
10 granted patents·1 pending application·127 citations·filing 2000–2014
88Inventor score
Top patents by PatentIndex Score
11 records- 0195US7337420B2Methodology for layout-based modulation and optimization of nitride liner stress effect in compact modelsIBM·Filed 2005·Granted Feb 26, 2008·61 cites·38 claims
- 0280US7503021B2Integrated circuit diagnosing method, system, and program productIBM·Filed 2005·Granted Mar 10, 2009·13 cites·17 claims
- 0380US6430729B1Process and system for maintaining 3 sigma process tolerance for parasitic extraction with on-the-fly biasingIBM·Filed 2000·Granted Aug 6, 2002·34 cites·27 claims
- 0466US8296691B2Methodology for improving device performance prediction from effects of active area corner roundingCHIDAMBARRAO DURESETI·Filed 2008·Granted Oct 23, 2012·4 cites·24 claims
- 0558US7302376B2Device modeling for proximity effectsIBM·Filed 2003·Granted Nov 27, 2007·7 cites·1 claims
- 0657US10031989B2Integrated circuit performance modeling using a connectivity-based condensed resistance model for a conductive structure in an integrated circuitGLOBALFOUNDRIES INC·Filed 2014·Granted Jul 24, 2018·1 cites·20 claims
- 0755US6519752B1Method of performing parasitic extraction for a multi-fingered transistorIBM·Filed 2000·Granted Feb 11, 2003·6 cites·26 claims
- 0851US8479131B2Method of determining FET source/drain wire, contact, and diffusion resistances in the presence of multiple contactsDEWEY III LEWIS W·Filed 2011·Granted Jul 2, 2013·1 cites·19 claims
- 0949US7979815B2Compact model methodology for PC landing pad lithographic rounding impact on device performanceIBM·Filed 2008·Granted Jul 12, 2011·0 cites·28 claims
- 1048US2008022237A1Device modeling for proximity effectsADLER ERIC·Filed 2007·Application pending·0 cites
- 1147US8302040B2Compact model methodology for PC landing pad lithographic rounding impact on device performanceCHIDAMBARRAO DURESETI·Filed 2011·Granted Oct 30, 2012·0 cites·5 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →