Inventor · disambiguated record
Srikanth B. Samavedam
Also filed as: SAMAVEDAM SRIKANTH · SAMAVEDAM SRIKANTH B · SAMAVEDAM SRIKANTH BALAJI
48 granted patents·18 pending applications·1,867 citations·filing 1997–2019
98Inventor score
Files withGLOBALFOUNDRIES INC21FREESCALE SEMICONDUCTOR INC15MOTOROLA INC4NANOCOOLERS INC4GILMER DAVID C3
Top patents by PatentIndex Score
66 records- 0198US9576952B2Integrated circuits with varying gate structures and fabrication methodsGLOBALFOUNDRIES INC·Filed 2014·Granted Feb 21, 2017·421 cites·20 claims
- 0298US9362180B2Integrated circuit having multiple threshold voltagesGLOBALFOUNDRIES INC·Filed 2014·Granted Jun 7, 2016·425 cites·20 claims
- 0397US6320784B1Memory cell and method for programming thereofMOTOROLA INC·Filed 2000·Granted Nov 20, 2001·180 cites·14 claims
- 0496US6897095B1Semiconductor process and integrated circuit having dual metal oxide gate dielectric with single metal gate electrodeFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted May 24, 2005·132 cites·23 claims
- 0595US6514808B1Transistor having a high K dielectric and short gate length and method thereforMOTOROLA INC·Filed 2001·Granted Feb 4, 2003·104 cites·11 claims
- 0693US7750374B2Process for forming an electronic device including a transistor having a metal gate electrodeFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted Jul 6, 2010·105 cites·20 claims
- 0793US6039803AUtilization of miscut substrates to improve relaxed graded silicon-germanium and germanium layers on siliconMASSACHUSETTS INST TECHNOLOGY·Filed 1997·Granted Mar 21, 2000·143 cites·13 claims
- 0892US9455201B2Integration method for fabrication of metal gate based multiple threshold voltage devices and circuitsGLOBALFOUNDRIES INC·Filed 2014·Granted Sep 27, 2016·18 cites·17 claims
- 0992US6894353B2Capped dual metal gate transistors for CMOS process and method for making the sameFREESCALE SEMICONDUCTOR INC·Filed 2002·Granted May 17, 2005·70 cites·9 claims
- 1091US9040404B2Replacement metal gate structure for CMOS deviceIBM·Filed 2012·Granted May 26, 2015·13 cites·5 claims
- 1190US6790719B1Process for forming dual metal gate structuresFREESCALE SEMICONDUCTOR INC·Filed 2003·Granted Sep 14, 2004·60 cites·24 claims
- 1289US9196548B2Methods of using a trench salicide routing layerRASHED MAHBUB·Filed 2012·Granted Nov 24, 2015·11 cites·18 claims
- 1389US8809178B2Methods of forming bulk FinFET devices with replacement gates so as to reduce punch through leakage currentsLIU YANXIANG·Filed 2012·Granted Aug 19, 2014·13 cites·20 claims
- 1487US7655550B2Method of making metal gate transistorsFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted Feb 2, 2010·14 cites·19 claims
- 1587US7445981B1Method for forming a dual metal gate structureFREESCALE SEMICONDUCTOR INC·Filed 2007·Granted Nov 4, 2008·15 cites·20 claims
- 1684US6475841B1Transistor with shaped gate electrode and method thereforMOTOROLA INC·Filed 2000·Granted Nov 5, 2002·32 cites·16 claims
- 1784US6423632B1Semiconductor device and a process for forming the sameMOTOROLA INC·Filed 2000·Granted Jul 23, 2002·34 cites·28 claims
- 1881US9935112B1SRAM cell having dual pass gate transistors and method of making the sameGLOBALFOUNDRIES INC·Filed 2017·Granted Apr 3, 2018·3 cites·16 claims
- 1981US7445976B2Method of forming a semiconductor device having an interlayer and structure thereforFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted Nov 4, 2008·9 cites·22 claims
- 2078US9437740B2Epitaxially forming a set of fins in a semiconductor deviceGLOBALFOUNDRIES INC·Filed 2015·Granted Sep 6, 2016·2 cites·7 claims
- 2178US8460996B2Semiconductor devices with different dielectric thicknessesKARVE GAURI V·Filed 2007·Granted Jun 11, 2013·7 cites·15 claims
- 2278US7709331B2Dual gate oxide device integrationFREESCALE SEMICONDUCTOR INC·Filed 2007·Granted May 4, 2010·7 cites·20 claims
- 2376US10644157B2Fin-type field effect transistors with uniform channel lengths and below-channel isolation on bulk semiconductor substrates and methodsGLOBALFOUNDRIES INC·Filed 2018·Granted May 5, 2020·2 cites·16 claims
- 2475US7858482B2Method of forming a semiconductor device using stress memorizationFREESCALE SEMICONDUCTOR INC·Filed 2008·Granted Dec 28, 2010·5 cites·15 claims
- 2573US6972224B2Method for fabricating dual-metal gate deviceFREESCALE SEMICONDUCTOR INC·Filed 2003·Granted Dec 6, 2005·16 cites·11 claims
- 2672US9099525B2Blanket EPI super steep retrograde well formation without Si recessKANG LAEGU·Filed 2012·Granted Aug 4, 2015·4 cites·11 claims
- 2772US8916442B2Method of forming step doping channel profile for super steep retrograde well field effect transistor and resulting deviceGLOBALFOUNDRIES INC·Filed 2013·Granted Dec 23, 2014·2 cites·12 claims
- 2871US8003454B2CMOS process with optimized PMOS and NMOS transistor devicesFREESCALE SEMICONDUCTOR INC·Filed 2008·Granted Aug 23, 2011·3 cites·20 claims
- 2970US9508743B2Dual three-dimensional and RF semiconductor devices using local SOIGLOBALFOUNDRIES INC·Filed 2014·Granted Nov 29, 2016·2 cites·12 claims
- 3069US8039339B2Separate layer formation in a semiconductor deviceFREESCALE SEMICONDUCTOR INC·Filed 2007·Granted Oct 18, 2011·4 cites·25 claims
- 3169US7666730B2Method for forming a dual metal gate structureFREESCALE SEMICONDUCTOR INC·Filed 2007·Granted Feb 23, 2010·4 cites·20 claims
- 3266US10347748B2Methods of forming source/drain regions on FinFET devicesGLOBALFOUNDRIES INC·Filed 2016·Granted Jul 9, 2019·1 cites·23 claims
- 3366US9034737B2Epitaxially forming a set of fins in a semiconductor deviceGLOBALFOUNDRIES INC·Filed 2013·Granted May 19, 2015·1 cites·20 claims
- 3464US8012821B2Semiconductor embedded resistor generationSAMSUNG ELECTRONICS CO LTD·Filed 2009·Granted Sep 6, 2011·3 cites·21 claims
- 3558US7683439B2Semiconductor device having a metal carbide gate with an electropositive element and a method of making the sameFREESCALE SEMICONDUCTOR INC·Filed 2007·Granted Mar 23, 2010·1 cites·9 claims
- 3657US10483172B2Transistor device structures with retrograde wells in CMOS applicationsGLOBALFOUNDRIES INC·Filed 2017·Granted Nov 19, 2019·0 cites·16 claims
- 3757US9099380B2Method of forming step doping channel profile for super steep retrograde well field effect transistor and resulting deviceGLOBALFOUNDRIES INC·Filed 2014·Granted Aug 4, 2015·0 cites·20 claims
- 3854US11127818B2High voltage transistor with fin source/drain regions and trench gate structureGLOBALFOUNDRIES US INC·Filed 2019·Granted Sep 21, 2021·0 cites·20 claims
- 3953US9852954B2Methods of forming transistors with retrograde wells in CMOS applications and the resulting device structuresGLOBALFOUNDRIES INC·Filed 2015·Granted Dec 26, 2017·0 cites·19 claims
- 4052US9966313B2FinFET device and method of manufacturingGLOBALFOUNDRIES INC·Filed 2016·Granted May 8, 2018·0 cites·10 claims
- 4152US9209181B2Methods of forming transistors with retrograde wells in CMOS applications and the resulting device structuresGLOBALFOUNDRIES INC·Filed 2013·Granted Dec 8, 2015·0 cites·10 claims
- 4252US2018233415A1Finfet device and method of manufacturingGLOBALFOUNDRIES INC·Filed 2018·Application pending·0 cites
- 4350US11462648B2Fin-based Schottky diode for integrated circuit (IC) products and methods of making such a Schottky diodeGLOBALFOUNDRIES US INC·Filed 2019·Granted Oct 4, 2022·0 cites·17 claims
- 4450US8178401B2Method for fabricating dual-metal gate deviceGILMER DAVID C·Filed 2006·Granted May 15, 2012·1 cites·10 claims
- 4549US9362357B2Blanket EPI super steep retrograde well formation without Si recessGLOBALFOUNDRIES INC·Filed 2015·Granted Jun 7, 2016·0 cites·20 claims
- 4647US2015270346A1Semiconductor devices with a replacement gate structure having a recessed channelGLOBALFOUNDRIES INC·Filed 2015·Application pending·0 cites
- 4746US11195947B2Semiconductor device with doped region adjacent isolation structure in extension regionGLOBALFOUNDRIES US INC·Filed 2019·Granted Dec 7, 2021·0 cites·19 claims
- 4846US9362280B2Semiconductor devices with different dielectric thicknessesKARVE GAURI V·Filed 2013·Granted Jun 7, 2016·0 cites·19 claims
- 4945US2009035928A1Method of processing a high-k dielectric for cet scalingHEGDE RAMA I·Filed 2007·Application pending·0 cites
- 5043US7910442B2Process for making a semiconductor device using partial etchingFREESCALE SEMICONDUCTOR INC·Filed 2007·Granted Mar 22, 2011·0 cites·20 claims
Showing the top 50 of 66 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →