Inventor · disambiguated record
Hamid Azimi
Also filed as: AZIMI HAMID · AZIMI HAMID R
17 granted patents·12 pending applications·198 citations·filing 1999–2023
94Inventor score
Top patents by PatentIndex Score
29 records- 0196US8618652B2Forming functionalized carrier structures with coreless packagesNALLA RAVI K·Filed 2010·Granted Dec 31, 2013·30 cites·15 claims
- 0291US10306760B2Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the methodINTEL CORP·Filed 2017·Granted May 28, 2019·6 cites·6 claims
- 0390US8440916B2Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the methodLI YONGGANG·Filed 2007·Granted May 14, 2013·17 cites·23 claims
- 0490US8035218B2Microelectronic package and method of manufacturing sameINTEL CORP·Filed 2009·Granted Oct 11, 2011·19 cites·12 claims
- 0585US7042077B2Integrated circuit package with low modulus layer and capacitor/interposerINTEL CORP·Filed 2004·Granted May 9, 2006·35 cites·19 claims
- 0683US9312233B2Method of forming molded panel embedded die structureINTEL CORP·Filed 2013·Granted Apr 12, 2016·5 cites·28 claims
- 0779US9648733B2Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the methodLI YONGGANG·Filed 2013·Granted May 9, 2017·3 cites·4 claims
- 0871US6858475B2Method of forming an integrated circuit substrateINTEL CORP·Filed 2003·Granted Feb 22, 2005·18 cites·27 claims
- 0966US7985622B2Method of forming collapse chip connection bumps on a semiconductor substrateINTEL CORP·Filed 2008·Granted Jul 26, 2011·3 cites·16 claims
- 1064US7413936B2Method of forming copper layersINTEL CORP·Filed 2005·Granted Aug 19, 2008·3 cites·4 claims
- 1163US6430058B1Integrated circuit packageINTEL CORP·Filed 1999·Granted Aug 6, 2002·23 cites·18 claims
- 1261US8987065B2Forming functionalized carrier structures with coreless packagesINTEL CORP·Filed 2013·Granted Mar 24, 2015·1 cites·5 claims
- 1360US6600233B2Integrated circuit package with surface mounted pins on an organic substrateINTEL CORP·Filed 2002·Granted Jul 29, 2003·11 cites·20 claims
- 1456US2025006671A1Semiconductor layer with dry deposition layerINTEL CORP·Filed 2023·Application pending·0 cites
- 1555US6413849B1Integrated circuit package with surface mounted pins on an organic substrate and method of fabrication thereforINTEL CORP·Filed 1999·Granted Jul 2, 2002·20 cites·16 claims
- 1654US2024030204A1Multi-die panel-level high performance computing componentsINTEL CORP·Filed 2022·Application pending·0 cites
- 1754US2024030065A1Multi-die panel-level high performance computing componentsINTEL CORP·Filed 2022·Application pending·0 cites
- 1854US2024030147A1Multi-die panel-level high performance computing componentsINTEL CORP·Filed 2022·Application pending·0 cites
- 1953US2008096323A1Integrated circuit die/package interconnectVANDENTOP GILROY J·Filed 2007·Application pending·0 cites
- 2052US9257380B2Forming functionalized carrier structures with coreless packagesINTEL CORP·Filed 2015·Granted Feb 9, 2016·0 cites·18 claims
- 2152US2023317592A1Substrate with low-permittivity core and buildup layersINTEL CORP·Filed 2022·Application pending·0 cites
- 2251US2023187386A1Microelectronic assemblies with glass substrates and planar inductorsINTEL CORP·Filed 2021·Application pending·0 cites
- 2351US2023197697A1Microelectronic assemblies with glass substrates and thin film capacitorsINTEL CORP·Filed 2021·Application pending·0 cites
- 2451US2024096809A1Microelectronic assemblies with mixed copper and solder interconnects having different thicknessesINTEL CORP·Filed 2022·Application pending·0 cites
- 2548US7005727B2Low cost programmable CPU package/substrateINTEL CORP·Filed 2002·Granted Feb 28, 2006·4 cites·15 claims
- 2647US2016190027A1Methods of forming panel embedded die structuresINTEL CORP·Filed 2016·Application pending·0 cites
- 2744US2011318850A1Microelectronic package and method of manufacturing sameGUZEK JOHN S·Filed 2011·Application pending·0 cites
- 2843US7330357B2Integrated circuit die/package interconnectINTEL CORP·Filed 2003·Granted Feb 12, 2008·0 cites·4 claims
- 2936US2004107569A1Metal core substrate packagingFiled 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →