Inventor · disambiguated record
Laurent Vallier
Also filed as: VALLIER LAURENT · VALLIER LAURENT J E
9 granted patents·1 pending application·63 citations·filing 1989–2019
86Inventor score
Files withCOMMISSARIAT ENERGIE ATOMIQUE7APPLIED MATERIALS INC1CENTRE NAT RECH SCIENT1COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENE ALT1
Top patents by PatentIndex Score
10 records- 0192US9570317B2Microelectronic method for etching a layerCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2013·Granted Feb 14, 2017·14 cites·28 claims
- 0286US9583339B2Method for forming spacers for a transistor gateCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2016·Granted Feb 28, 2017·4 cites·28 claims
- 0382US10062602B2Method of etching a porous dielectric materialCOMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENE ALT·Filed 2013·Granted Aug 28, 2018·5 cites·28 claims
- 0475US5102687AProcess for surface treatment by plasma of a substrate supported by an electrodeCENTRE NAT RECH SCIENT·Filed 1989·Granted Apr 7, 1992·25 cites·3 claims
- 0570US8956886B2Embedded test structure for trimming process controlAPPLIED MATERIALS INC·Filed 2014·Granted Feb 17, 2015·2 cites·20 claims
- 0665US11380543B2Method for fabricating a monocrystalline structureCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2019·Granted Jul 5, 2022·1 cites·13 claims
- 0753US6818488B2Process for making a gate for a short channel CMOS transistor structureCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2001·Granted Nov 16, 2004·9 cites·14 claims
- 0851US2014187046A1Method for forming spacers for a transitor gateCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2013·Application pending·0 cites
- 0946US9048011B2Method of obtaining patters in an antireflective layerCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2013·Granted Jun 2, 2015·0 cites·15 claims
- 1033US6551698B1Method for treating a silicon substrate, by nitriding, to form a thin insulating layerCOMMISSARIAT ENERGIE ATOMIQUE·Filed 1999·Granted Apr 22, 2003·3 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →