Method for forming spacers for a transitor gate

Abstract

The invention relates to a method for forming spacers for a gate of a field effect transistor, the gate being situated above a layer of semiconductor material, comprising a step of forming a layer of nitride covering the transistor gate, the method being characterized in that it comprises: after the step of forming the layer of nitride, at least one step of modifying the layer of nitride by implantation of light ions in the layer of nitride in order to form a modified layer of nitride, the step of modification being performed so as not to modify the layer of nitride over its entire thickness at flanks of the gate, the step of modifying the layer of nitride by implantation being performed using a plasma comprising the light ions; at least one step of removing the modified layer of nitride by means of a selective etching of the modified layer of nitride vis-à-vis said semiconductor material and vis-à-vis the non-modified layer of nitride

1 . A method for forming spacers for a gate of a field effect transistor, the gate being situated above a layer of semiconductor material, comprising:
 forming a layer of nitride covering the transistor gate;   after forming the layer of nitride, modifying the layer of nitride by implantation of light ions in the layer of nitride in order to form a modified layer of nitride, the modifying being performed so as not to modify the layer of nitride over its entire thickness at flanks of the gate, the modifying includes using a plasma comprising the light ions; and   removing the modified layer of nitride by a selective etching of the modified layer of nitride vis-à-vis said semiconductor material and vis-à-vis the non-modified layer of nitride.   
     
     
         2 . A method according to  claim 1 , wherein the implantation of light ions and the implanted dose, are implemented so that the modified layer of nitride is configured to be etched selectively vis-à-vis said semiconductor material and vis-à-vis the non-modified layer of nitride. 
     
     
         3 . A method according to  claim 1 , wherein the layer of nitride is a layer of silicon nitride. 
     
     
         4 . A method according to  claim 1 , wherein the modifying the layer of nitride by implantation using a plasma modifies the layer of nitride continuously from the surface of the nitride layer and to a depth between 1 nm and 30 nm. 
     
     
         5 . A method according to  claim 1 , wherein the modifying the layer of nitride is preceded by a anisotropic etching. 
     
     
         6 . A method according to  claim 5 , wherein the anisotropic etching comprises a dry etching in a plasma based on methyl fluoride (CH 3 F). 
     
     
         7 . A method according to  claim 1 , wherein the modifying comprises putting the layer of nitride in a presence of a plasma comprising the light ions in an etching reactor. 
     
     
         8 . A method according to  claim 1 , wherein the modifying includes implantation of light ions by an implanter. 
     
     
         9 . A method according to  claim 1 , wherein the removing the modified layer of nitride is performed by wet etching selective to said semiconductor material. 
     
     
         10 . A method according to  claim 1 , wherein the semiconductor material is at least one of silicon (Si), germanium (Ge) and silicon-germanium (SiGe) and wherein the removing the modified layer of nitride is performed by selective wet etching selectively to the semiconductor material and/or an oxide of the semiconductor material. 
     
     
         11 . A method according to  claim 10 , wherein the wet etching is selective to silicon by a solution based on hydrofluoric acid (FH). 
     
     
         12 . A method according to  claim 9 , wherein the wet etching is selective to silicon and is obtained by a solution based on phosphoric acid (H 3 PO 4 ). 
     
     
         13 . A method according to  claim 1 , wherein the removing includes dry etching selective to said semiconductor material. 
     
     
         14 . A method according to  claim 13 , wherein the semiconductor material includes silicon and wherein the removing includes dry etching selective to the silicon (Si) and/or silicon oxide (SiO 2 ). 
     
     
         15 . A method according to  claim 14 , wherein the dry etching is performed in a plasma formed in a confined chamber using nitrogen trifluoride (NF 3 ) and ammonia (NH 3 ). 
     
     
         16 . A method according to  claim 13 , wherein the dry etching comprises:
 dry etching consisting of formation of solid salts;   sublimating the solid salts.   
     
     
         17 . A method according to  claim 1 , wherein the modifying the layer of nitride and the removing are performed within a single plasma reactor. 
     
     
         18 . A method according to  claim 1 , wherein the modifying being a single step modification performed so as to modify the layer of nitride throughout its thickness over all surfaces parallel to a plane of a substrate on which the gate rests and not to modify the layer of nitride throughout its thickness on surfaces perpendicular to the plane. 
     
     
         19 . A method according to  claim 1 , wherein the modifying includes multiple sequences each comprising a step of modification and a step of removal, and wherein, during at least one of the steps of modification, only part of the thickness of the layer of nitride is modified. 
     
     
         20 . A method according to  claim 19 , wherein the multiple sequences are repeated until the layer of nitride disappears on all surfaces parallel to a plane of a substrate on which the gate rests. 
     
     
         21 . A method according to  claim 1 , wherein the gate of the field effect transistor is situated on a stack of layers forming an elaborate substrate of silicon on insulator (SOI). 
     
     
         22 . A method according to  claim 1 , wherein the semiconductor material is at least one of silicon (Si), germanium (Ge) and silicon-germanium (SiGe). 
     
     
         23 . A method according to  claim 1 , wherein the selective etching is selective to silicon oxide (SiO 2 ). 
     
     
         24 . A method according to  claim 1 , wherein the light ions include at least one of helium (H) and hydrogen (H 2 ). 
     
     
         25 . A method according to  claim 1 , wherein the field effect transistor is a FDSOI transistor. 
     
     
         26 . A method according to  claim 1 , wherein the field effect transistor is a FinFET transistor. 
     
     
         27 . A method according to  claim 1 , wherein the implantation of light ions comprises at least two implantations having different implantation directions and wherein, to modify the direction of the implantation, the layer of nitride is inclined. 
     
     
         28 . A method of etching a layer of nitride selectively to silicon (Si) and/or silicon oxide (SiO2) comprising:
 at least one step of modifying all or part of the layer of nitride by implantation of hydrogen (H 2 ) or helium (He) in the layer of nitride in order to form a modified layer of nitride, wherein the at least one step of modifying comprises putting the layer of nitride in a presence of a plasma comprising light ions in an etching reactor; and   at least one step of removing the modified layer of nitride by selective etching of the modified layer of nitride vis-à-vis the silicon (Si) and/or silicon oxide (SiO2).   
     
     
         29 . A method according to  claim 28 , wherein the selective etching is obtained by applying a solution based on phosphoric acid (H 3 PO 4 ). 
     
     
         30 . A method according to  claim 28 , wherein the selective etching is obtained by applying a solution based on hydrofluoric acid (FH).