Inventor · disambiguated record
Samuel V. Dunton
Also filed as: DUNTON SAMUEL V · DUNTON SAMUEL VANCE
20 granted patents·5 pending applications·573 citations·filing 1993–2013
95Inventor score
Top patents by PatentIndex Score
25 records- 0199US7238607B2Method to minimize formation of recess at surface planarized by chemical mechanical planarizationSANDISK 3D LLC·Filed 2005·Granted Jul 3, 2007·162 cites·19 claims
- 0298US7575984B2Conductive hard mask to protect patterned features during trench etchSANDISK 3D LLC·Filed 2006·Granted Aug 18, 2009·111 cites·17 claims
- 0393US7307013B2Nonselective unpatterned etchback to expose buried patterned featuresSANDISK 3D LLC·Filed 2004·Granted Dec 11, 2007·67 cites·91 claims
- 0492US5405488ASystem and method for plasma etching endpoint detectionVLSI TECHNOLOGY INC·Filed 1993·Granted Apr 11, 1995·92 cites·9 claims
- 0591US7422985B2Method for reducing dielectric overetch using a dielectric etch stop at a planar surfaceSANDISK 3D LLC·Filed 2005·Granted Sep 9, 2008·16 cites·32 claims
- 0688US8008187B2Method for reducing dielectric overetch using a dielectric etch stop at a planar surfaceSANDISK 3D LLC·Filed 2010·Granted Aug 30, 2011·7 cites·23 claims
- 0776US6649451B1Structure and method for wafer comprising dielectric and semiconductorMATRIX SEMICONDUCTOR INC·Filed 2001·Granted Nov 18, 2003·23 cites·32 claims
- 0875US6224460B1Laser interferometry endpoint detection with windowless polishing pad for chemical mechanical polishing processVLSI TECHNOLOGY INC·Filed 1999·Granted May 1, 2001·35 cites·9 claims
- 0966US7291562B2Method to form topography in a deposited layer above a substrateCHEN YUNG-TIN·Filed 2005·Granted Nov 6, 2007·2 cites·20 claims
- 1063US6319836B1Planarization systemLSI LOGIC CORP·Filed 2000·Granted Nov 20, 2001·9 cites·19 claims
- 1162US7790607B2Method for reducing dielectric overetch using a dielectric etch stop at a planar surfaceSANDISK 3D LLC·Filed 2007·Granted Sep 7, 2010·1 cites·37 claims
- 1259US6727107B1Method of testing the processing of a semiconductor wafer on a CMP apparatusLSI LOGIC CORP·Filed 2001·Granted Apr 27, 2004·8 cites·20 claims
- 1355US8722518B2Methods for protecting patterned features during trench etchSANDISK 3D LLC·Filed 2013·Granted May 13, 2014·0 cites·17 claims
- 1454US2009273022A1Conductive hard mask to protect patterned features during trench etchSANDISK 3D LLC·Filed 2009·Application pending·0 cites
- 1553US6028013AMoisture repellant integrated circuit dielectric material combinationVLSI TECHNOLOGY INC·Filed 1999·Granted Feb 22, 2000·17 cites·14 claims
- 1651US2011306177A1Method for reducing dielectric overetch using a dielectric etch stop at a planar surfaceDUNTON SAMUEL V·Filed 2011·Application pending·0 cites
- 1750US6565416B2Laser interferometry endpoint detection with windowless polishing pad for chemical mechanical polishing processKONINKL PHILIPS ELECTRONICS NV·Filed 2001·Granted May 20, 2003·4 cites·7 claims
- 1849US6586326B2Metal planarization systemLSI LOGIC CORP·Filed 2001·Granted Jul 1, 2003·3 cites·6 claims
- 1945US6951808B2Metal planarization systemLSI LOGIC CORP·Filed 2003·Granted Oct 4, 2005·1 cites·11 claims
- 2042US6196900B1Ultrasonic transducer slurry dispenserVLSI TECHNOLOGY INC·Filed 1999·Granted Mar 6, 2001·9 cites·12 claims
- 2141US7300876B2Method for cleaning slurry particles from a surface polished by chemical mechanical polishingSANDISK 3D LLC·Filed 2004·Granted Nov 27, 2007·0 cites·53 claims
- 2241US2003102528A1Wafer surface that facilitates particle removalFiled 2002·Application pending·0 cites
- 2339US2002105057A1Wafer surface that facilitates particle removalFiled 2001·Application pending·0 cites
- 2438US2006249753A1High-density nonvolatile memory array fabricated at low temperature comprising semiconductor diodesMATRIX SEMICONDUCTOR INC·Filed 2005·Application pending·0 cites
- 2537US6103634ARemoval of inorganic anti-reflective coating using fluorine etch processVLSI TECHNOLOGY INC·Filed 1998·Granted Aug 15, 2000·6 cites·21 claims
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