Inventor · disambiguated record
Sheila Marie L. Alvarez
Also filed as: ALVAREZ SHEILA · ALVAREZ SHEILA M · ALVAREZ SHEILA MARIE · ALVAREZ SHEILA MARIE L
27 granted patents·3 pending applications·401 citations·filing 2002–2016
97Inventor score
Files withSTATS CHIPPAC LTD11ST ASSEMBLY TEST SERVICES LTD4CAMACHO ZIGMUND RAMIREZ3CHI HEEJO2DAHILIG FREDERICK RODRIGUEZ2
Top patents by PatentIndex Score
30 records- 0198US9443797B2Semiconductor device having wire studs as vertical interconnect in FO-WLPSTATS CHIPPAC LTD·Filed 2013·Granted Sep 13, 2016·55 cites·16 claims
- 0293US7250685B2Etched leadframe flipchip package systemSTATS CHIPPAC LTD·Filed 2006·Granted Jul 31, 2007·25 cites·20 claims
- 0393US7148086B2Semiconductor package with controlled solder bump wetting and fabrication method thereforSTATS CHIPPAC LTD·Filed 2005·Granted Dec 12, 2006·27 cites·10 claims
- 0493US6775140B2Heat spreaders, heat spreader packages, and fabrication methods for use with flip chip semiconductor devicesST ASSEMBLY TEST SERVICES LTD·Filed 2003·Granted Aug 10, 2004·79 cites·24 claims
- 0592US9330994B2Semiconductor device and method of forming RDL and vertical interconnect by laser direct structuringSTATS CHIPPAC LTD·Filed 2014·Granted May 3, 2016·22 cites·21 claims
- 0692US9331003B1Integrated circuit packaging system with pre-molded leadframe and method of manufacture thereofCAMACHO ZIGMUND RAMIREZ·Filed 2014·Granted May 3, 2016·15 cites·19 claims
- 0792US7443015B2Integrated circuit package system with downset leadSTATS CHIPPAC LTD·Filed 2006·Granted Oct 28, 2008·28 cites·13 claims
- 0891US9406531B1Integrated circuit packaging system with photoimagable dielectric-defined trace and method of manufacture thereofCAMACHO ZIGMUND RAMIREZ·Filed 2014·Granted Aug 2, 2016·11 cites·9 claims
- 0991US7830020B2Integrated circuit package system employing device stackingSTATS CHIPPAC LTD·Filed 2007·Granted Nov 9, 2010·19 cites·15 claims
- 1090US10446523B2Semiconductor device and method of forming wire studs as vertical interconnect in FO-WLPSTATS CHIPPAC PTE LTD·Filed 2016·Granted Oct 15, 2019·5 cites·25 claims
- 1189US8405230B2Semiconductor flip chip package having substantially non-collapsible spacer and method of manufacture thereofLEE JAE SOO·Filed 2011·Granted Mar 26, 2013·11 cites·21 claims
- 1289US7880313B2Semiconductor flip chip package having substantially non-collapsible spacerCHIPPAC INC·Filed 2005·Granted Feb 1, 2011·17 cites·6 claims
- 1387US7414318B2Etched leadframe flipchip package systemSTATS CHIPPAC LTD·Filed 2007·Granted Aug 19, 2008·13 cites·20 claims
- 1484US7169641B2Semiconductor package with selective underfill and fabrication method therforSTATS CHIPPAC LTD·Filed 2005·Granted Jan 30, 2007·13 cites·20 claims
- 1576US9502267B1Integrated circuit packaging system with support structure and method of manufacture thereofCHI HEEJO·Filed 2014·Granted Nov 22, 2016·4 cites·20 claims
- 1675US7153725B2Strip-fabricated flip chip in package and flip chip in system heat spreader assemblies and fabrication methods thereforST ASSEMBLY TEST SERVICES LTD·Filed 2004·Granted Dec 26, 2006·21 cites·20 claims
- 1772US7829384B2Semiconductor device and method of laser-marking wafers with tape applied to its active surfaceSTATS CHIPPAC LTD·Filed 2008·Granted Nov 9, 2010·6 cites·19 claims
- 1868US8207598B2Semiconductor package heat spreaderARARAO VIRGIL COTOCO·Filed 2009·Granted Jun 26, 2012·4 cites·10 claims
- 1968US7575956B2Fabrication method for semiconductor package heat spreadersST ASSEMBLY TEST SERVICES LTD·Filed 2003·Granted Aug 18, 2009·12 cites·20 claims
- 2066US9679769B1Integrated circuit packaging system with photoimagable dielectric-defined trace and method of manufacture thereofSTATS CHIPPAC PTE LTD·Filed 2016·Granted Jun 13, 2017·1 cites·20 claims
- 2163US7352055B2Semiconductor package with controlled solder bump wettingSTATS CHIPPAC LTD·Filed 2006·Granted Apr 1, 2008·2 cites·6 claims
- 2262US9406642B1Integrated circuit packaging system with insulated trace and method of manufacture thereofCHI HEEJO·Filed 2015·Granted Aug 2, 2016·1 cites·17 claims
- 2359US8120187B2Integrated circuit package system employing device stacking and method of manufacture thereofDAHILIG FREDERICK RODRIGUEZ·Filed 2010·Granted Feb 21, 2012·1 cites·15 claims
- 2458US8174127B2Integrated circuit package system employing device stackingDAHILIG FREDERICK RODRIGUEZ·Filed 2011·Granted May 8, 2012·1 cites·20 claims
- 2553US7327025B2Heat spreader for thermally enhanced semiconductor packageST ASSEMBLY TEST SERVICES LTD·Filed 2004·Granted Feb 5, 2008·5 cites·19 claims
- 2651US6802445B2Cost effective substrate fabrication for flip-chip packagesST ASSEMBLY TEST SERVICES PTE·Filed 2002·Granted Oct 12, 2004·3 cites·39 claims
- 2743US7482683B2Integrated circuit encapsulation system with ventSTATS CHIPPAC LTD·Filed 2006·Granted Jan 27, 2009·0 cites·20 claims
- 2843US2008272487A1System for implementing hard-metal wire bondsSHIM IL KWON·Filed 2008·Application pending·0 cites
- 2940US2015179602A1Integrated circuit packaging system with conductive ink and method of manufacture thereofCAMACHO ZIGMUND RAMIREZ·Filed 2013·Application pending·0 cites
- 3039US2008284038A1Integrated circuit package system with perimeter paddleDIMAANO JR ANTONIO B·Filed 2007·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →