Inventor · disambiguated record
Sung-Hsiung Wang
Also filed as: WANG SUNG-HSIUNG
11 granted patents·3 pending applications·163 citations·filing 2000–2010
91Inventor score
Top patents by PatentIndex Score
14 records- 0187US6559004B1Method for forming three dimensional semiconductor structure and three dimensional capacitorUNITED MICROELECTRONICS CORP·Filed 2001·Granted May 6, 2003·51 cites·15 claims
- 0280US6903644B2Inductor device having improved quality factorTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Jun 7, 2005·28 cites·31 claims
- 0373US7074721B2Method for forming thick copper self-aligned dual damasceneTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Jul 11, 2006·17 cites·18 claims
- 0471US7038266B2Metal-insulator-metal (MIM) capacitor structure formed with dual damascene structureTAIWAN SEMICONDUCTOR MFG·Filed 2004·Granted May 2, 2006·16 cites·10 claims
- 0567US6417096B1Method for avoiding photo residue in dual damascene with acid treatmentUNITED MICROELECTRONICS CORP·Filed 2000·Granted Jul 9, 2002·12 cites·20 claims
- 0664US6583489B2Method for forming interconnect structure with low dielectric constantUNITED MICROELECTRONICS CORP·Filed 2002·Granted Jun 24, 2003·10 cites·8 claims
- 0760US6355568B1Cleaning method for copper dual damascene processUNITED MICROELECTRONICS CORP·Filed 2000·Granted Mar 12, 2002·7 cites·22 claims
- 0858US7297629B2Ultra-thick metal-copper dual damascene processTAIWAN SEMICONDUCTOR MFG·Filed 2004·Granted Nov 20, 2007·8 cites·20 claims
- 0956US7968968B2Inductor utilizing pad metal layerTAIWAN SEMICONDUCTOR MFG·Filed 2010·Granted Jun 28, 2011·1 cites·12 claims
- 1056US6617234B2Method of forming metal fuse and bonding padUNITED MICROELECTRONICS CORP·Filed 2001·Granted Sep 9, 2003·13 cites·18 claims
- 1147US7229879B2Metal-insulator-metal (MIM) capacitor structure formed with dual damascene structureTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Jun 12, 2007·0 cites·6 claims
- 1241US2008122029A1Inductor utilizing pad metal layerTAIWAN SEMICONDUCTOR MFG·Filed 2006·Application pending·0 cites
- 1337US2002155261A1Method for forming interconnect structure with low dielectric constantFiled 2001·Application pending·0 cites
- 1433US2003020163A1Bonding pad structure for copper/low-k dielectric material BEOL processFiled 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →