Inventor · disambiguated record
Theodore Speers
Also filed as: SPEERS THEODORE · SPEERS THEODORE M
35 granted patents·7 pending applications·1,633 citations·filing 1990–2013
98Inventor score
Top patents by PatentIndex Score
42 records- 0199US7459772B2Face-to-face bonded I/O circuit die and functional logic circuit die systemACTEL CORP·Filed 2004·Granted Dec 2, 2008·266 cites·19 claims
- 0299US7358601B1Architecture for face-to-face bonding between substrate and multiple daughter chipsACTEL CORP·Filed 2005·Granted Apr 15, 2008·269 cites·14 claims
- 0399US7129746B1System-on-a-chip integrated circuit including dual-function analog and digital inputsACTEL CORP·Filed 2004·Granted Oct 31, 2006·156 cites·6 claims
- 0498US7170315B2Programmable system on a chipACTEL CORP·Filed 2004·Granted Jan 30, 2007·118 cites·22 claims
- 0598US6838902B1Synchronous first-in/first-out block memory for a field programmable gate arrayACTEL CORP·Filed 2003·Granted Jan 4, 2005·196 cites·6 claims
- 0697US7613943B2Programmable system on a chipACTEL CORP·Filed 2007·Granted Nov 3, 2009·32 cites·26 claims
- 0797US7102391B1Clock-generator architecture for a programmable-logic-based system on a chipACTEL CORP·Filed 2004·Granted Sep 5, 2006·63 cites·32 claims
- 0895US7579895B2Clock-generator architecture for a programmable-logic-based system on a chipACTEL CORP·Filed 2007·Granted Aug 25, 2009·28 cites·1 claims
- 0995US7385418B2Non-volatile memory architecture for programmable-logic-based system on a chipACTEL CORP·Filed 2006·Granted Jun 10, 2008·28 cites·10 claims
- 1094US7298178B1Clock-generator architecture for a programmable-logic-based system on a chipACTEL CORP·Filed 2006·Granted Nov 20, 2007·24 cites·9 claims
- 1191US7937601B2Programmable system on a chipACTEL CORP·Filed 2009·Granted May 3, 2011·11 cites·55 claims
- 1291US7112993B2Non-volatile memory configuration scheme for volatile-memory-based programmable circuits in an FPGAACTEL CORP·Filed 2004·Granted Sep 26, 2006·32 cites·8 claims
- 1390US5194759AMethods for preventing disturbance of antifuses during programmingACTEL CORP·Filed 1992·Granted Mar 16, 1993·102 cites·1 claims
- 1489US7919979B1Field programmable gate array including a non-volatile user memory and method for programmingACTEL CORP·Filed 2006·Granted Apr 5, 2011·15 cites·9 claims
- 1589US7423451B2System-on-a-chip integrated circuit including dual-function analog and digital inputsACTEL CORP·Filed 2006·Granted Sep 9, 2008·10 cites·11 claims
- 1688US7352206B1Integrated circuit device having state-saving and initialization featureACTEL CORP·Filed 2004·Granted Apr 1, 2008·20 cites·19 claims
- 1787US7675320B2Non-volatile memory architecture for programmable-logic-based system on a chipACTEL CORP·Filed 2008·Granted Mar 9, 2010·7 cites·11 claims
- 1886US7560952B2Integrated circuit device having state-saving and initialization featureACTEL CORP·Filed 2008·Granted Jul 14, 2009·6 cites·19 claims
- 1986US7487376B2Programmable system on a chipACTEL CORP·Filed 2007·Granted Feb 3, 2009·6 cites·1 claims
- 2084US8040151B2Programmable logic device with programmable wakeup pinsACTEL CORP·Filed 2008·Granted Oct 18, 2011·12 cites·14 claims
- 2183US7102384B1Non-volatile memory architecture for programmable-logic-based system on a chipACTEL CORP·Filed 2004·Granted Sep 5, 2006·14 cites·9 claims
- 2283US5528600ATestability circuits for logic arraysACTEL CORP·Filed 1993·Granted Jun 18, 1996·40 cites·6 claims
- 2383US5126282AMethods of reducing anti-fuse resistance during programmingACTEL CORP·Filed 1990·Granted Jun 30, 1992·81 cites·5 claims
- 2478US7884640B2PLD providing soft wakeup logicACTEL CORP·Filed 2008·Granted Feb 8, 2011·9 cites·27 claims
- 2578US7616026B2System-on-a-chip integrated circuit including dual-function analog and digital inputsACTEL CORP·Filed 2008·Granted Nov 10, 2009·3 cites·18 claims
- 2677US7227380B2Synchronous first-in/first-out block memory for a field programmable gate arrayACTEL CORP·Filed 2005·Granted Jun 5, 2007·6 cites·6 claims
- 2776US6980027B2Synchronous first-in/first-out block memory for a field programmable gate arrayACTEL CORP·Filed 2004·Granted Dec 27, 2005·12 cites·1 claims
- 2874US5614818ATestability circuits for logic circuit arraysACTEL CORP·Filed 1994·Granted Mar 25, 1997·27 cites·4 claims
- 2970US9000807B2On-chip probe circuit for detecting faults in an FPGAMICROSEMI SOC CORP·Filed 2013·Granted Apr 7, 2015·3 cites·9 claims
- 3070US7394289B2Synchronous first-in/first-out block memory for a field programmable gate arrayACTEL CORP·Filed 2007·Granted Jul 1, 2008·4 cites·7 claims
- 3170US7280058B1Mixed-signal system-on-a-chip analog signal direct interconnection through programmable logic controlACTEL CORP·Filed 2006·Granted Oct 9, 2007·7 cites·6 claims
- 3268US9103880B2On-chip probe circuit for detecting faults in an FPGAMICROSEMI SOC CORP·Filed 2013·Granted Aug 11, 2015·2 cites·19 claims
- 3365US7501872B2Clock-generator architecture for a programmable-logic-based system on a chipACTEL CORP·Filed 2007·Granted Mar 10, 2009·4 cites·11 claims
- 3462US5804960ACircuits for testing the function circuit modules in an integrated circuitACTEL CORP·Filed 1996·Granted Sep 8, 1998·18 cites·7 claims
- 3559US7414428B2Non-volatile memory configuration scheme for volatile-memory-based programmable circuits in an FPGAACTEL CORP·Filed 2006·Granted Aug 19, 2008·2 cites·9 claims
- 3650US2007176631A1Programmable system on a chipACTEL CORP·Filed 2006·Application pending·0 cites
- 3746US2008309371A1Face-to-face bonded i/o circuit die and functional logic circuit die systemACTEL CORP·Filed 2008·Application pending·0 cites
- 3846US2008191363A1Architecture for face-to-face bonding between substrate and multiple daughter chipsACTEL CORP·Filed 2008·Application pending·0 cites
- 3946US2008272804A1Non-volatile memory configuration scheme for volatile-memory-based programmable circuits in an fpgaACTEL CORP·Filed 2008·Application pending·0 cites
- 4045US2008218207A1Synchronous first-in/first-out block memory for a field programmable gate arrayACTEL CORP·Filed 2008·Application pending·0 cites
- 4145US2009058462A1Field programmable gate array including a nonvolatile user memory and method for programmingACTEL CORP·Filed 2008·Application pending·0 cites
- 4243US2014043059A1Secure digest for pld configuration dataMICROSEMI SOC CORP·Filed 2013·Application pending·0 cites
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