US2008272804A1PendingUtilityA1

Non-volatile memory configuration scheme for volatile-memory-based programmable circuits in an fpga

Assignee: ACTEL CORPPriority: Dec 23, 2004Filed: Jul 21, 2008Published: Nov 6, 2008
Est. expiryDec 23, 2024(expired)· nominal 20-yr term from priority
Inventors:Theodore Speers
H03K 19/17772H03K 19/17758H03K 19/17756
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Claims

Abstract

A non-volatile memory configuration scheme is disclosed for volatile-memory-based programmable circuits in a programmable integrated circuit that includes an FPGA fabric, a plurality of first configurable circuit elements external to the FPGA fabric, and a plurality of second configurable circuit elements external to the FPGA fabric. A plurality of distributed configuration non-volatile memory cells is disposed in the FPGA, each one of the distributed configuration non-volatile memory cells coupled to a different one of the plurality of first configurable circuit elements. A non-volatile memory array stores configuration information for the second configurable circuit elements. A plurality of register cells is disposed with the second configurable circuit elements and is coupleable to the non-volatile memory array, each one of the register cells coupled to a different one of the plurality of second configurable circuit elements.

Claims

exact text as granted — not AI-modified
1 . A non-volatile memory configuration scheme for volatile configurable circuits in a programmable integrated circuit comprising:
 an FPGA fabric;   a first plurality of configurable circuit elements disposed on the integrated circuit external to the FPGA fabric;   a second plurality of configurable circuit elements disposed on the integrated circuit external to the FPGA fabric;   a plurality of distributed configuration non-volatile memory cells disposed in the FPGA fabric, each of the plurality of first configurable circuit elements coupled to a different one of the distributed configuration non-volatile memory cells;   a non-volatile memory array for storing configuration information for the second configurable circuit elements; and   a plurality of register cells disposed within the second plurality of configurable circuit elements and coupleable to the non-volatile memory array, each one of the register cells associated with a different one of the plurality of second configurable circuit elements.

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