Inventor · disambiguated record
Eiichi Kowashi
Also filed as: KOWASHI EIICHI
47 granted patents·3 pending applications·2,455 citations·filing 1991–2013
99Inventor score
Technology areasG06F
Top patents by PatentIndex Score
50 records- 0194US8396915B2Processor for performing multiply-add operations on packed dataPELEG ALEXANDER·Filed 2012·Granted Mar 12, 2013·12 cites·10 claims
- 0294US5721892AMethod and apparatus for performing multiply-subtract operations on packed dataINTEL CORP·Filed 1995·Granted Feb 24, 1998·198 cites·30 claims
- 0393US6385634B1Method for performing multiply-add operations on packed dataINTEL CORP·Filed 1995·Granted May 7, 2002·128 cites·14 claims
- 0492US8793299B2Processor for performing multiply-add operations on packed dataINTEL CORP·Filed 2013·Granted Jul 29, 2014·8 cites·6 claims
- 0591US7395298B2Method and apparatus for performing multiply-add operations on packed dataINTEL CORP·Filed 2003·Granted Jul 1, 2008·71 cites·18 claims
- 0691US6470370B2Method and apparatus for multiplying and accumulating complex numbers in a digital filterINTEL CORP·Filed 2001·Granted Oct 22, 2002·62 cites·29 claims
- 0789US6035316AApparatus for performing multiply-add operations on packed dataINTEL CORP·Filed 1996·Granted Mar 7, 2000·85 cites·16 claims
- 0889US5852726AMethod and apparatus for executing two types of instructions that specify registers of a shared logical register file in a stack and a non-stack referenced mannerINTEL CORP·Filed 1995·Granted Dec 22, 1998·163 cites·107 claims
- 0987US5983256AApparatus for performing multiply-add operations on packed dataINTEL CORP·Filed 1997·Granted Nov 9, 1999·68 cites·25 claims
- 1086US5936872AMethod and apparatus for storing complex numbers to allow for efficient complex multiplication operations and performing such complex multiplication operationsINTEL CORP·Filed 1995·Granted Aug 10, 1999·128 cites·40 claims
- 1186US5793661AMethod and apparatus for performing multiply and accumulate operations on packed dataINTEL CORP·Filed 1995·Granted Aug 11, 1998·131 cites·21 claims
- 1284US8185571B2Processor for performing multiply-add operations on packed dataPELEG ALEXANDER D·Filed 2009·Granted May 22, 2012·7 cites·51 claims
- 1384US6823353B2Method and apparatus for multiplying and accumulating complex numbers in a digital filterINTEL CORP·Filed 2002·Granted Nov 23, 2004·31 cites·8 claims
- 1483US7424505B2Method and apparatus for performing multiply-add operations on packed dataINTEL CORP·Filed 2001·Granted Sep 9, 2008·17 cites·118 claims
- 1583US5907842AMethod of sorting numbers to obtain maxima/minima values with orderingINTEL CORP·Filed 1995·Granted May 25, 1999·97 cites·11 claims
- 1683US5835748AMethod for executing different sets of instructions that cause a processor to perform different data type operations on different physical registers files that logically appear to software as a single aliased register fileINTEL CORP·Filed 1995·Granted Nov 10, 1998·114 cites·157 claims
- 1783US5701508AExecuting different instructions that cause different data type operations to be performed on single logical register fileINTEL CORP·Filed 1995·Granted Dec 23, 1997·94 cites·35 claims
- 1881US7149882B2Processor with instructions that operate on different data types stored in the same single logical register fileINTEL CORP·Filed 2004·Granted Dec 12, 2006·23 cites·83 claims
- 1981US6058408AMethod and apparatus for multiplying and accumulating complex numbers in a digital filterINTEL CORP·Filed 1995·Granted May 2, 2000·97 cites·14 claims
- 2079US5940859AEmptying packed data state during execution of packed data instructionsINTEL CORP·Filed 1995·Granted Aug 17, 1999·65 cites·25 claims
- 2179US5361370ASingle-instruction multiple-data processor having dual-ported local memory architecture for simultaneous data transmission on local memory ports and global portINTEL CORP·Filed 1991·Granted Nov 1, 1994·67 cites·8 claims
- 2278US6237016B1Method and apparatus for multiplying and accumulating data samples and complex coefficientsINTEL CORP·Filed 1997·Granted May 22, 2001·85 cites·18 claims
- 2378US5983257ASystem for signal processing using multiply-add operationsINTEL CORP·Filed 1995·Granted Nov 9, 1999·86 cites·24 claims
- 2472US8626814B2Method and apparatus for performing multiply-add operations on packed dataPELEG ALEXANDER·Filed 2011·Granted Jan 7, 2014·1 cites·40 claims
- 2571US8725787B2Processor for performing multiply-add operations on packed dataPELEG ALEXANDER D·Filed 2012·Granted May 13, 2014·1 cites·19 claims
- 2671US5935240AComputer implemented method for transferring packed data between register files and memoryINTEL CORP·Filed 1995·Granted Aug 10, 1999·60 cites·18 claims
- 2771US5430854ASimd with selective idling of individual processors based on stored conditional flags, and with consensus among all flags used for conditional branchingINTEL CORP·Filed 1993·Granted Jul 4, 1995·60 cites·1 claims
- 2870US5983253AComputer system for performing complex digital filtersINTEL CORP·Filed 1995·Granted Nov 9, 1999·59 cites·45 claims
- 2969US6170997B1Method for executing instructions that operate on different data types stored in the same single logical register fileINTEL CORP·Filed 1997·Granted Jan 9, 2001·46 cites·25 claims
- 3068US6036350AMethod of sorting signed numbers and solving absolute differences using packed instructionsINTEL CORP·Filed 1997·Granted Mar 14, 2000·54 cites·39 claims
- 3168US5835392AMethod for performing complex fast fourier transforms (FFT's)INTEL CORP·Filed 1995·Granted Nov 10, 1998·52 cites·16 claims
- 3265US6751725B2Methods and apparatuses to clear state for operation of a stackINTEL CORP·Filed 2001·Granted Jun 15, 2004·7 cites·41 claims
- 3365US6128614AMethod of sorting numbers to obtain maxima/minima values with orderingINTEL CORP·Filed 1999·Granted Oct 3, 2000·38 cites·21 claims
- 3461US8745119B2Processor for performing multiply-add operations on packed dataINTEL CORP·Filed 2013·Granted Jun 3, 2014·0 cites·5 claims
- 3561US5859997AMethod for performing multiply-substrate operations on packed dataINTEL CORP·Filed 1996·Granted Jan 12, 1999·33 cites·19 claims
- 3660US6792523B1Processor with instructions that operate on different data types stored in the same single logical register fileINTEL CORP·Filed 1999·Granted Sep 14, 2004·30 cites·17 claims
- 3759US8495123B2Processor for performing multiply-add operations on packed dataPELEG ALEXANDER·Filed 2012·Granted Jul 23, 2013·0 cites·10 claims
- 3859US7509367B2Method and apparatus for performing multiply-add operations on packed dataINTEL CORP·Filed 2004·Granted Mar 24, 2009·2 cites·37 claims
- 3959US5857096AMicroarchitecture for implementing an instruction to clear the tags of a stack reference register fileINTEL CORP·Filed 1995·Granted Jan 5, 1999·36 cites·19 claims
- 4059US2013262836A1Processor for performing multiply-add operations on packed dataINTEL CORP·Filed 2013·Application pending·0 cites
- 4159US2013262547A1Processor for performing multiply-add operations on packed dataINTEL CORP·Filed 2013·Application pending·0 cites
- 4258US6018351AComputer system performing a two-dimensional rotation of packed data representing multimedia informationINTEL CORP·Filed 1997·Granted Jan 25, 2000·33 cites·30 claims
- 4357US6266686B1Emptying packed data state during execution of packed data instructionsINTEL CORP·Filed 1999·Granted Jul 24, 2001·23 cites·20 claims
- 4457US5857088ASystem for configuring memory space for storing single decoder table, reconfiguring same space for storing plurality of decoder tables, and selecting one configuration based on encoding schemeINTEL CORP·Filed 1995·Granted Jan 5, 1999·32 cites·20 claims
- 4554US7373490B2Emptying packed data state during execution of packed data instructionsINTEL CORP·Filed 2004·Granted May 13, 2008·2 cites·23 claims
- 4652US5530884ASystem with plurality of datapaths having dual-ported local memory architecture for converting prefetched variable length data to fixed length decoded dataINTEL CORP·Filed 1994·Granted Jun 25, 1996·18 cites·21 claims
- 4751US5548793ASystem for controlling arbitration using the memory request signal types generated by the plurality of datapathsINTEL CORP·Filed 1994·Granted Aug 20, 1996·17 cites·18 claims
- 4848US2005038977A1Processor with instructions that operate on different data types stored in the same single logical register fileFiled 2004·Application pending·0 cites
- 4943US5517665ASystem for controlling arbitration using the memory request signal types generated by the plurality of datapaths having dual-ported local memory architecture for simultaneous data transmissionINTEL CORP·Filed 1994·Granted May 14, 1996·11 cites·18 claims
- 5032US5984515AComputer implemented method for providing a two dimensional rotation of packed dataINTEL CORP·Filed 1997·Granted Nov 16, 1999·3 cites·29 claims
Join the waitlist — get patent alerts
Get an alert when Eiichi Kowashi files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →