Inventor · disambiguated record
Dheeraj Subbareddy
Also filed as: SUBBAREDDY DHEERAJ · SUBBAREDDY DHEERAJ R
61 granted patents·16 pending applications·101 citations·filing 2011–2025
98Inventor score
Top patents by PatentIndex Score
77 records- 0197US11929339B2Innovative interconnect design for package architecture to improve latencyINTEL CORP·Filed 2023·Granted Mar 12, 2024·2 cites·20 claims
- 0294US10795853B2Multiple dies hardware processors and methodsINTEL CORP·Filed 2017·Granted Oct 6, 2020·9 cites·24 claims
- 0394US10649927B2Dual in-line memory module (DIMM) programmable accelerator cardINTEL CORP·Filed 2018·Granted May 12, 2020·16 cites·15 claims
- 0493US11557541B2Interconnect architecture with silicon interposer and EMIBINTEL CORP·Filed 2018·Granted Jan 17, 2023·6 cites·25 claims
- 0592US12353238B2Flexible instruction set architecture supporting varying frequenciesINTEL CORP·Filed 2021·Granted Jul 8, 2025·2 cites·22 claims
- 0691US12026008B2Techniques for clock signal transmission in integrated circuits and interposersINTEL CORP·Filed 2022·Granted Jul 2, 2024·1 cites·19 claims
- 0791US11586579B2Multiple dies hardware processors and methodsINTEL CORP·Filed 2021·Granted Feb 21, 2023·2 cites·24 claims
- 0891US11216397B2Translation circuitry for an interconnection in an active interposer of a semiconductor packageINTEL CORP·Filed 2019·Granted Jan 4, 2022·6 cites·20 claims
- 0989US11080449B2Modular periphery tile for integrated circuit deviceINTEL CORP·Filed 2020·Granted Aug 3, 2021·2 cites·20 claims
- 1088US12334449B2Selective use of different advanced interface bus with electronic chipsINTEL CORP·Filed 2020·Granted Jun 17, 2025·2 cites·20 claims
- 1188US9720730B2Providing an asymmetric multicore processor system transparently to an operating systemGINZBURG BORIS·Filed 2011·Granted Aug 1, 2017·15 cites·20 claims
- 1287US2025077753A1Modular periphery tile for integrated circuit deviceALTERA CORP·Filed 2024·Application pending·0 cites
- 1386US12266625B2Innovative interconnect design for package architecture to improve latencyINTEL CORP·Filed 2024·Granted Apr 1, 2025·0 cites·20 claims
- 1486US10642946B2Modular periphery tile for integrated circuit deviceINTEL CORP·Filed 2018·Granted May 5, 2020·3 cites·17 claims
- 1585US11609262B2On-die aging measurements for dynamic timing modelingINTEL CORP·Filed 2018·Granted Mar 21, 2023·2 cites·20 claims
- 1682US12153866B2Modular periphery tile for integrated circuit deviceINTEL CORP·Filed 2023·Granted Nov 26, 2024·0 cites·20 claims
- 1781US12347783B2Interconnect architecture with silicon interposer and EMIBINTEL CORP·Filed 2024·Granted Jul 1, 2025·0 cites·20 claims
- 1881US12206410B2Programmable logic device with fine-grained disaggregationINTEL CORP·Filed 2023·Granted Jan 21, 2025·0 cites·20 claims
- 1981US10601426B1Programmable logic device with fine-grained disaggregationINTEL CORP·Filed 2018·Granted Mar 24, 2020·2 cites·21 claims
- 2081US10162687B2Selective migration of workloads between heterogeneous compute elements based on evaluation of migration performance benefit and available energy and thermal budgetsINTEL CORP·Filed 2012·Granted Dec 25, 2018·5 cites·25 claims
- 2181US9329900B2Hetergeneous processor apparatus and methodINTEL CORP·Filed 2012·Granted May 3, 2016·6 cites·25 claims
- 2279US2025286555A1Power Management using Voltage Islands on Programmable Logic DevicesALTERA CORP·Filed 2025·Application pending·0 cites
- 2378US12237831B2Network-on-chip (NOC) with flexible data widthINTEL CORP·Filed 2023·Granted Feb 25, 2025·0 cites·16 claims
- 2478US12216150B2On-die aging measurements for dynamic timing modelingINTEL CORP·Filed 2022·Granted Feb 4, 2025·0 cites·20 claims
- 2578US11901299B2Interconnect architecture with silicon interposer and EMIBINTEL CORP·Filed 2022·Granted Feb 13, 2024·0 cites·25 claims
- 2678US11500412B2Techniques for clock signal transmission in integrated circuits and interposersINTEL CORP·Filed 2019·Granted Nov 15, 2022·2 cites·16 claims
- 2778US9672046B2Apparatus and method for intelligently powering heterogeneous processor componentsINTEL CORP·Filed 2012·Granted Jun 6, 2017·5 cites·32 claims
- 2878US2025315079A1Flexible Instruction Set Architecture Supporting Varying FrequenciesALTERA CORP·Filed 2025·Application pending·0 cites
- 2976US11915996B2Microelectronics assembly including top and bottom packages in stacked configuration with shared coolingINTEL CORP·Filed 2019·Granted Feb 27, 2024·2 cites·20 claims
- 3076US11899615B2Multiple dies hardware processors and methodsINTEL CORP·Filed 2023·Granted Feb 13, 2024·0 cites·24 claims
- 3176US11658144B2Innovative interconnect design for package architecture to improve latencyINTEL CORP·Filed 2021·Granted May 23, 2023·0 cites·20 claims
- 3275US11714941B2Modular periphery tile for integrated circuit deviceINTEL CORP·Filed 2021·Granted Aug 1, 2023·0 cites·20 claims
- 3375US11528029B2Apparatus to synchronize clocks of configurable integrated circuit dies through an interconnect bridgeINTEL CORP·Filed 2018·Granted Dec 13, 2022·2 cites·20 claims
- 3474US11595045B2Programmable logic device with fine-grained disaggregationINTEL CORP·Filed 2021·Granted Feb 28, 2023·0 cites·20 claims
- 3574US9727345B2Method for booting a heterogeneous system and presenting a symmetric core viewINTEL CORP·Filed 2013·Granted Aug 8, 2017·3 cites·17 claims
- 3674US2025167786A1Network-on-chip (noc) with flexible data widthALTERA CORP·Filed 2025·Application pending·0 cites
- 3773US2021288013A1Interface Bus for Inter-Die Communication in a Multi-Chip Package Over High Density InterconnectsINTEL CORP·Filed 2021·Application pending·0 cites
- 3872US11700002B2Network-on-chip (NOC) with flexible data widthINTEL CORP·Filed 2021·Granted Jul 11, 2023·0 cites·20 claims
- 3972US11621713B2High-speed core interconnect for multi-die programmable logic devicesINTEL CORP·Filed 2021·Granted Apr 4, 2023·0 cites·20 claims
- 4072US2025285985A1Selective use of different advanced interface bus with electronic chipsALTERA CORP·Filed 2025·Application pending·0 cites
- 4171US11070209B2Programmable logic device with fine-grained disaggregationINTEL CORP·Filed 2020·Granted Jul 20, 2021·0 cites·7 claims
- 4270US11669472B2Frequency translation circuitry for an interconnection in an active interposer of a semiconductor packageINTEL CORP·Filed 2021·Granted Jun 6, 2023·0 cites·20 claims
- 4369US12355359B2Switch based on load currentINTEL CORP·Filed 2021·Granted Jul 8, 2025·0 cites·20 claims
- 4469US11342918B2Network-on-chip (NOC) with flexible data widthINTEL CORP·Filed 2020·Granted May 24, 2022·0 cites·20 claims
- 4569US9639372B2Apparatus and method for heterogeneous processors mapping to virtual coresINTEL CORP·Filed 2012·Granted May 2, 2017·2 cites·22 claims
- 4669US9448829B2Hetergeneous processor apparatus and methodINTEL CORP·Filed 2012·Granted Sep 20, 2016·2 cites·20 claims
- 4769US2024028544A1Inter-die communication of programmable logic devicesINTEL CORP·Filed 2023·Application pending·0 cites
- 4868US11342238B2Rotatable architecture for multi-chip package (MCP)INTEL CORP·Filed 2018·Granted May 24, 2022·1 cites·20 claims
- 4968US11128301B2High-speed core interconnect for multi-die programmable logic devicesINTEL CORP·Filed 2020·Granted Sep 21, 2021·0 cites·20 claims
- 5067US12341511B2Power management using voltage islands on programmable logic devicesINTEL CORP·Filed 2021·Granted Jun 24, 2025·0 cites·20 claims
Showing the top 50 of 77 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →