Inventor · disambiguated record
Hisaya Sakai
Also filed as: SAKAI HISAYA
17 granted patents·5 pending applications·117 citations·filing 2002–2024
92Inventor score
Files withFUJITSU LTD8FUJITSU SEMICONDUCTOR LTD6SANDISK TECHNOLOGIES LLC3AKIYAMA SHINICHI2FUJITSU MICROELECTRONICS LTD1
Top patents by PatentIndex Score
22 records- 0196US11152284B1Three-dimensional memory device with a dielectric isolation spacer and methods of forming the sameSANDISK TECHNOLOGIES LLC·Filed 2020·Granted Oct 19, 2021·7 cites·19 claims
- 0289US6750541B2Semiconductor deviceFUJITSU LTD·Filed 2002·Granted Jun 15, 2004·47 cites·17 claims
- 0386US7994055B2Method of manufacturing semiconductor apparatus, and semiconductor apparatusFUJITSU SEMICONDUCTOR LTD·Filed 2008·Granted Aug 9, 2011·14 cites·13 claims
- 0481US7358180B2Method of forming wiring structure and semiconductor deviceFUJITSU LTD·Filed 2004·Granted Apr 15, 2008·22 cites·9 claims
- 0578US7579277B2Semiconductor device and method for fabricating the sameFUJITSU MICROELECTRONICS LTD·Filed 2006·Granted Aug 25, 2009·6 cites·10 claims
- 0673US8338953B2Method of manufacturing a semiconductor device and semiconductor deviceAKIYAMA SHINICHI·Filed 2011·Granted Dec 25, 2012·2 cites·4 claims
- 0772US8373274B2Method of forming wiring structure and semiconductor device comprising underlying refractory metal layersFUJITSU SEMICONDUCTOR LTD·Filed 2008·Granted Feb 12, 2013·3 cites·2 claims
- 0867US7381643B2Wiring structure forming method and semiconductor deviceFUJITSU LTD·Filed 2006·Granted Jun 3, 2008·2 cites·16 claims
- 0964US8030207B2Method of manufacturing a semiconductor device and semiconductor deviceFUJITSU SEMICONDUCTOR LTD·Filed 2008·Granted Oct 4, 2011·1 cites·10 claims
- 1063US6992005B2Semiconductor device and method of manufacturing the sameFUJITSU LTD·Filed 2004·Granted Jan 31, 2006·9 cites·14 claims
- 1162US7935624B2Fabrication method of semiconductor device having a barrier layer containing MnFUJITSU SEMICONDUCTOR LTD·Filed 2007·Granted May 3, 2011·2 cites·17 claims
- 1261US8546949B2Semiconductor device having wirings formed by damasceneORYOJI MICHIO·Filed 2010·Granted Oct 1, 2013·2 cites·10 claims
- 1359US2025359050A1Memory device including contoured drain-select-level isolation structures and methods for forming the sameSANDISK TECHNOLOGIES LLC·Filed 2024·Application pending·0 cites
- 1455US8536708B2Method of manufacturing a semiconductor device and semiconductor deviceAKIYAMA SHINICHI·Filed 2012·Granted Sep 17, 2013·0 cites·8 claims
- 1551US2008067680A1Semiconductor device and fabrication process thereofFUJITSU LTD·Filed 2007·Application pending·0 cites
- 1649US11756877B2Three-dimensional memory device with via structures surrounded by perforated dielectric moat structure and methods of making the sameSANDISK TECHNOLOGIES LLC·Filed 2021·Granted Sep 12, 2023·0 cites·19 claims
- 1747US7906433B2Semiconductor device having wirings formed by damascene and its manufacture methodFUJITSU SEMICONDUCTOR LTD·Filed 2006·Granted Mar 15, 2011·0 cites·10 claims
- 1846US2011021020A1Semiconductor device and fabrication process thereofFUJITSU SEMICONDUCTOR LTD·Filed 2010·Application pending·0 cites
- 1945US2008057717A1Semiconductor device manufacturing methodFUJITSU LTD·Filed 2007·Application pending·0 cites
- 2043US2005151263A1Wiring structure forming method and semiconductor deviceFUJITSU LTD·Filed 2004·Application pending·0 cites
- 2138US8101513B2Manufacture method for semiconductor device using damascene methodKANKI TSUYOSHI·Filed 2006·Granted Jan 24, 2012·0 cites·9 claims
- 2237US6900542B2Semiconductor device having increased adhesion between a barrier layer for preventing copper diffusion and a conductive layer, and method of manufacturing the sameFUJITSU LTD·Filed 2003·Granted May 31, 2005·0 cites·9 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →