US7208396B2ExpiredUtilityA1

Permanent adherence of the back end of a wafer to an electrical component or sub-assembly

Assignee: TEGAL CORPPriority: Jan 16, 2002Filed: Jan 16, 2002Granted: Apr 24, 2007
Est. expiryJan 16, 2022(expired)· nominal 20-yr term from priority
H10P 14/40C23C 14/165C23C 14/022
58
PatentIndex Score
8
Cited by
19
References
44
Claims

Abstract

A plurality of successive layers are firmly adhered to one another and to a wafer surface and an electrical component or sub-assembly even when the wafer surface is not even and the layers are bent. The wafer surface is initially cleaned by an ion bombardment of an inert gas (e.g. argon) on the wafer surface in an RF discharge at a relatively high gas pressure. The wafer surface is then provided with a microscopic roughness by applying a low power so that the inert gas (e.g. argon) ions do not have sufficient energy to etch the surface. A layer of chromium is then sputter deposited on the wafer surface as by a DC magnetron with an intrinsic tensile stress and low gas entrapment by passing a minimal amount of the inert gas through the magnetron and by applying no RF bias to the wafer. The chromium layer is atomically bonded to the microscopically rough wafer surface. A layer of a nickel-vanadium alloy is deposited on the chromium layer and a layer of a metal selected from the group consisting of gold, silver and copper is deposited on the nickel-vanadium layer. The nickel-vanadium layer is deposited between the chromium layer and the metal layer with an intrinsic compressive stress by applying an RF bias to the wafer to neutralize the intrinsic tensile stress of the chromium layer and any intrinsic stress of the metal layer. The electrical component is adhered as by solder to the metal selected from the group consisting of gold, silver and copper.

Claims

exact text as granted — not AI-modified
1. In a method of etching a surface of a wafer with a microscopic roughness to prepare the wafer surface for receiving a deposition of a material on the wafer surface, the steps of
 removing a thin layer from the surface of the wafer to eliminate any impurities from the surface of the wafer,
 wherein the material of the thin layer is the same as the material of the remaining wafer, and 
 
 thereafter creating the microscopic roughness on the surface of the wafer to receive a deposition of the material on the surface by providing ions of an inert gas by physical RF plasma etch with an insufficient energy to etch the surface of the wafer but with a sufficient energy to create the microscopic roughness on the surface of the wafer. 
 
     
     
       2. In a method as set forth in  claim 1  wherein the inert gas is argon. 
     
     
       3. In a method as set forth in  claim 1 
 wherein the wafer is disposed on a waferland and 
 wherein a layer of chromium is deposited on the waferland after the microscopic roughness has been produced on the surface of the wafer. 
 
     
     
       4. In a method as set forth in  claim 1 
 wherein the inert gas is argon and 
 wherein the wafer is disposed on a waferland and 
 wherein a layer of chromium is deposited on the waferland after the microscopic roughness has been produced on a the surface of the wafer. 
 
     
     
       5. In a method as set forth in  claim 1  wherein the inert gas pressure is about 4×10 −3  Torr. 
     
     
       6. In a method as set forth in  claim 1  wherein the inert gas flow is between 40 to 50 sccm. 
     
     
       7. In a method as set forth in  claim 1  wherein the energy provided to the ions of the inert gas is between 50 to 100 W. 
     
     
       8. In a method as set forth in  claim 1  wherein the microscopic roughness is an atomic-scaled roughness. 
     
     
       9. In a method of providing for an attachment of an electrical component to a wafer, the steps of:
 removing a thin layer from the surface of the wafer by ions of inert gas by physical RF plasma etch,
 wherein the material of the thin layer is the same as the material of the remaining wafer, 
 
 thereafter providing the surface of the wafer with a microscopic roughness, 
 thereafter depositing a layer of chromium on the microscopically rough surface of the wafer with a low intrinsic tensile stress, and 
 thereafter depositing a layer of nickel vanadium on the surface of the wafer with a low intrinsic compressive stress. 
 
     
     
       10. In a method as set forth in  claim 9 
 wherein a layer of a metal selected from a group consisting of gold, silver and copper is deposited on the surface of the nickel vanadium layer and 
 wherein a component is soldered to the layer of the metal selected from the group consisting of copper, gold and silver. 
 
     
     
       11. In a method as set forth in  claim 10 
 wherein the layer of the chromium is deposited on the microscopically rough surface of the wafer with no RF bias. 
 
     
     
       12. In a method as set forth in  claim 11 
 wherein the layer of chromium is deposited on the microscopically rough surface of the wafer at a low rate of flow of an inert gas and 
 wherein an RF bias power is applied during the deposition of the nickel vanadium layer on the chromium layer to produce the low intrinsic compressive stress in the nickel vanadium layer. 
 
     
     
       13. In a method as set forth in  claim 9 
 wherein the layer of chromium is deposited on the microscopically rough surface of the wafer at a low rate of the flow of an inert gas. 
 
     
     
       14. In a method as set forth in  claim 9 
 wherein the layer of the chromium is deposited on the microscopically rough surface of the wafer with no RF bias and 
 wherein the layer of chromium is deposited on the microscopically rough surface of the wafer at a low rate of flow of an inert gas and 
 wherein an RF bias power is applied during the deposition of the nickel vanadium layer on the chromium layer to produce the low intrinsic compressive stress in the nickel vanadium layer. 
 
     
     
       15. In a method as set forth in  claim 14 
 wherein a layer of a metal selected from a group consisting of gold, silver and copper is deposited on the surface of the nickel vanadium layer and 
 wherein the component is soldered to the layer of the metal selected from the group consisting of copper, gold and silver. 
 
     
     
       16. In a method as set forth in  claim 9 
 wherein the microscopic roughness on the surface of the layer is created by providing ions of an inert gas by physical RF plasma etch on the surface of the wafer with an insufficient energy to etch the surface of the wafer but with a sufficient energy to create the microscopic roughness on the surface of the wafer. 
 
     
     
       17. In a method as set forth in  claim 9  wherein the microscopic roughness is an atomic-scaled roughness. 
     
     
       18. In a method of providing a deposition on a surface of a wafer, the steps of:
 removing a thin layer from the surface of the wafer to eliminate impurities from the surface of the wafer,
 wherein the material of the thin layer is the same as the material of the remaining wafer, 
 
 creating a microscopic roughness on the surface of the wafer, and 
 depositing a chromium layer with a low intrinsic tensile stress on the microscopically rough surface of the wafer. 
 
     
     
       19. In a method as set forth in  claim 18 
 wherein the chromium layer is deposited on the microscopically rough surface of the wafer in a chamber and 
 wherein an inert gas having a low flow rate is passed through the chamber with no RF bias on the wafer, when the chromium layer is deposited on the microscopically rough surface of the wafer, to prevent molecules of the inert gas from being entrapped in the chromium layer. 
 
     
     
       20. In a method as set forth in  claim 19 
 wherein the inert gas is argon. 
 
     
     
       21. In a method as set forth in  20 
 wherein the wafer is disposed on a waferland and 
 wherein a layer of chromium is deposited on the waferland, before etching the wafer surface, to prevent the layer of chromium deposited on the wafer from being contaminated by the material from the waferland. 
 
     
     
       22. In a method as set forth in  claim 19 
 wherein the microscopic roughness is produced on the surface of the wafer by providing the molecules of the inert gas with an insufficient energy to etch the surface of the wafer but with a sufficient energy to create the microscopic roughness on the surface of the wafer. 
 
     
     
       23. In a method as set forth in  claim 18 
 wherein no RF bias is provided when the chromium layer is deposited on the surface of the wafer and 
 wherein the chromium layer is deposited on the microscopically rough surface of the wafer in a chamber and 
 wherein an inert gas having a low flow rate is passed through the chamber, when the chromium layer is deposited on the microscopically rough surface of the wafer, to prevent the inert gas from being entrapped in the chromium layer and 
 wherein the inert gas is argon. 
 
     
     
       24. In a method as set forth in  claim 18 
 wherein the chromium layer is deposited with a low intrinsic tensile stress on the microscopically rough surface by providing the layer with no RF bias. 
 
     
     
       25. In a method as set forth in  claim 18 
 wherein the microscopic roughness is created on the surface of the wafer by providing ions of an inert gas by physical RF plasma etch on the surface of the wafer with an insufficient energy to etch the surface of the wafer but with a sufficient energy to create the microscopic roughness on the surface of the wafer. 
 
     
     
       26. In a method as set forth in  claim 18  wherein the microscopic roughness is an atomic-scaled roughness. 
     
     
       27. In a method of preparing a wafer surface for receiving an electronic component, the steps of:
 removing a thin layer from the surface of the wafer,
 wherein the material of the thin layer is the same as the material of the remaining wafer, 
 
 thereafter creating a microscopic roughness on the surface of the wafer by providing ions of an inert gas by physical RF plasma etch with an insufficient energy to etch the surface of the wafer but with a sufficient energy to create the microscopic roughness on the surface of the wafer, and 
 thereafter depositing a chromium layer on the microscopically rough surface of the wafer in a chamber in which a minimal amount of an inert gas is passed through the chamber during the deposition to prevent molecules of the inert gas from being entrapped in the chromium layer. 
 
     
     
       28. In a method as set forth in  claim 27 
 wherein no wafer bias is produced on the wafer when the chromium layer is deposited on the surface of the wafer. 
 
     
     
       29. In a method as set forth in  claim 28 
 wherein the chromium layer is deposited on the surface of the wafer with a low amount of intrinsic tensile stress. 
 
     
     
       30. In a method as set forth in  claim 27 
 wherein the chromium layer is deposited on the surface of the wafer under tension with a low amount of stress. 
 
     
     
       31. In a method as set forth in  claim 27  wherein the microscopic roughness is an atomic-scaled roughness. 
     
     
       32. In a method of providing a deposition on a surface of a wafer for receiving an electronic component on the wafer surface, the steps of:
 removing a thin layer from the surface of the wafer,
 wherein the material of the thin layer is the same as the material of the remaining wafer, 
 
 creating a microscopic roughness on the surface of the wafer, and 
 atomically bonding a chromium layer to the microscopically rough surface on the wafer. 
 
     
     
       33. In a method as set forth in  claim 32 
 wherein the chromium layer is deposited on the microscopically rough surface of the wafer with no RF bias. 
 
     
     
       34. In a method as set forth in  claim 33 
 wherein an intrinsic tensile stress is provided with a low value in the chromium layer and 
 wherein the microscopic roughness on the surface of the wafer is provided by disposing the wafer in a chamber and by passing ions of an inert gas by physical RF plasma etch through the chamber with insufficient energy to etch the surface of the wafer but with sufficient energy to produce the microscopic roughness on the surface of the wafer. 
 
     
     
       35. In a method as set forth in  claim 32 , the step of:
 providing a low intrinsic tensile stress in the chromium layer. 
 
     
     
       36. In a method as set forth in  claim 32 
 wherein the microscopic roughness on the surface of the wafer is provided by disposing the wafer in a chamber and by passing ions of an inert gas by physical RF plasma etch through the chamber with insufficient energy to etch the surface of the wafer but with sufficient energy to produce the microscopic roughness on the surface of the wafer. 
 
     
     
       37. In a method as set forth in  claim 32 
 wherein the microscopic roughness is created on the surface of the wafer by providing ions of an inert gas by physical RF plasma etch on the surface of the wafer with an insufficient energy to etch the surface of the wafer but a sufficient energy to create the microscopic roughness on the surface of the wafer. 
 
     
     
       38. In a method as set forth in  claim 32  wherein the microscopic roughness is an atomic-scaled roughness. 
     
     
       39. In a method of etching a surface of a wafer with a microscopic roughness, the steps of:
 providing a flow of an inert gas in the order of forty (40) to fifty (50) standard cubic centimeters per minute through a chamber containing the wafer and at a relatively high gas pressure in the order of 4–6×10 −3  Torr to remove a thin layer from the surface of the wafer, 
 thereafter providing a flow of an inert gas through the chamber at a flow rate of approximately forty (40) to fifty (50) standard cubic centimeters per minute and a power in the order of six hundred watts (600 W) to twelve hundred watts (1200 W) to remove impurities from the surface of the wafer and provide an atomically rough surface, 
 disposing the wafer on a waferland, and 
 then providing a flow of an inert gas at a rate of approximately 40–50 standard cubic centimeters per minute through the chamber at a low power in the order of fifty watts (50 W) to one hundred watts (100 W) to provide the surface of the wafer with the microscopic roughness. 
 
     
     
       40. In a method as set forth in  claim 39 
 wherein the power applied in the chamber to remove the impurities from the surface of the wafer is in the order of 600–1200 watts for approximately thirty (30) seconds and 
 wherein the flow of the inert gas through the chamber to provide the surface of the wafer with the microscopic roughness occurs for a period of approximately sixty (60) seconds. 
 
     
     
       41. In a method as set forth in  claim 40 
 wherein a layer of chromium is deposited on the surface of the waferland before the surface of the wafer is etched. 
 
     
     
       42. In a method as set forth in  claim 40 
 wherein the nickel vanadium layer is deposited on the chromium layer with a power of approximately six thousand watts (6000 W), with a flow rate of argon of approximately five (5) sccm and with RF power of approximately three hundred (300) watts. 
 
     
     
       43. In a method as set forth in  claim 39 
 wherein a layer of chromium is deposited on the microscopically rough surface of the wafer without any RF bias and at a low flow rate of the inert gas. 
 
     
     
       44. In a method as set forth in  claim 39 
 wherein a layer of nickel vanadium is deposited on the surface of the chromium layer with an RF bias power of approximately 300 watts and with a flow rate of argon of approximately 5 sccm.

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