System and method for defect inspection using voltage contrast in a charged particle system

Abstract

A system and method for defect inspection using voltage contrast in a charged particle system are provided. Some embodiments of the system and method include positioning the stage at a first position to enable a first beam of the plurality of beams to scan a first surface area of the wafer at a first time to generate a first image associated with the first surface area; positioning the stage at a second position to enable a second beam of the plurality of beams to scan the first surface area at a second time to generate a second image associated with the first surface area; and comparing the first image with the second image to enable detecting whether a defect is identified in the first surface area of the wafer.

1 .- 15 . (canceled) 
     
     
         16 . A non-transitory computer readable medium that stores a set of instructions that is executable by at least one processor of a computing device to cause the computing device to perform a method of inspecting a wafer, the method comprising:
 adjusting a speed of a stage holding the wafer to adjust a time between each scan of a pixel on the wafer; and   scanning the pixel using a plurality of beams, wherein each scan occurs at a different time by a different beam of the plurality of beams scanning the pixel.   
     
     
         17 . The non-transitory computer readable medium of  claim 16 , wherein the set of instructions that is executable by at least one processor of a computing device to cause the computing device to further perform:
 adjusting a beam current of a beam of the plurality of beams, wherein the scanning of the pixel comprises scanning the pixel at multiple beam currents.   
     
     
         18 . The non-transitory computer readable medium of  claim 17 , wherein the set of instructions that is executable by at least one processor of a computing device to cause the computing device to further perform:
 causing a beam current of each of the plurality of beams to remain constant during the scan.   
     
     
         19 . The non-transitory computer readable medium of  claim 16 , wherein the set of instructions that is executable by at least one processor of a computing device to cause the computing device to further perform:
 positioning the stage at a first position to enable a first beam of the plurality of beams to scan a first surface area of the wafer at a first time to generate a first image associated with the first surface area, and   continuously moving the stage to position the stage at a second position to enable a second beam of the plurality of beams to scan the first surface area at a second time to generate a second image associated with the first surface area.   
     
     
         20 . The non-transitory computer readable medium of  claim 19 , wherein the set of instructions that is executable by at least one processor of a computing device to cause the computing device to further perform:
 constructing a first voltage contrast image corresponding to the first image; and   constructing a second voltage contrast image corresponding to the second image of the first image and the second image.   
     
     
         21 . The non-transitory computer readable medium of  claim 20 , wherein the set of instructions that is executable by at least one processor of a computing device to cause the computing device to further perform:
 determining differences between voltage contrast levels of the first and second images.   
     
     
         22 . The non-transitory computer readable medium of  claim 16 , wherein the set of instructions that is executable by at least one processor of a computing device to cause the computing device to further perform:
 positioning the stage at a pre-scan position, prior to positioning the stage at a first position, to enable a high-current beam to charge a first surface area at a pre-scan time prior to a first time.   
     
     
         23 . The non-transitory computer readable medium of  claim 16 , wherein the set of instructions that is executable by at least one processor of a computing device to cause the computing device to further perform:
 positioning the stage at a pre-scan position, prior to positioning the stage at a first position, to enable a first beam of the plurality of beams to pre-charge a first surface area of the wafer, and   continuously moving the stage to position the stage at the first position to enable a second beam of the plurality of beams to scan the first surface area to generate an image associated with the first surface area.   
     
     
         24 . A charged particle multi-beam system for generating a plurality of beams for inspecting a wafer positioned on a stage, the system comprising:
 a controller including circuitry and is configured to:   adjust a time between each scan of a pixel on the wafer by adjusting a speed of the stage holding the wafer; and   scan the pixel using a plurality of beams, wherein each scan occurs at a different time by a different beam of the plurality of beams scanning the pixel.   
     
     
         25 . The charged particle multi-beam system of  claim 24 , wherein the controller is further configured to:
 adjust a beam current of a beam of the plurality of beams, wherein the scanning of the pixel comprises scanning the pixel at multiple beam currents.   
     
     
         26 . The charged particle multi-beam system of  claim 25 , wherein the controller is further configured to:
 construct voltage contrast images of the pixel on the wafer corresponding to each of the plurality of beams; and   compare the voltage contrast images corresponding to each of the plurality of beams to enable detecting whether a defect is identified in the pixel on the wafer.   
     
     
         27 . The charged particle multi-beam system of  claim 25 , wherein the controller is further configured to:
 causing a beam current of each of the plurality of beams to remain constant during the scan.   
     
     
         28 . The charged particle multi-beam system of  claim 24 , wherein the controller is further configured to:
 positioning the stage at a first position to enable a first beam of the plurality of beams to scan a first surface area of the wafer at a first time to generate a first image associated with the first surface area, and   continuously moving the stage to position the stage at a second position to enable a second beam of the plurality of beams to scan the first surface area at a second time to generate a second image associated with the first surface area.   
     
     
         29 . The charged particle multi-beam system of  claim 28 , wherein the controller is further configured to:
 constructing a first voltage contrast image corresponding to the first image; and   constructing a second voltage contrast image corresponding to the second image of the first image and the second image.   
     
     
         30 . The charged particle multi-beam system of  claim 29 , wherein the controller is further configured to:
 determining differences between voltage contrast levels of the first and second images.   
     
     
         31 . The charged particle multi-beam system of  claim 24 , wherein the controller is further configured to:
 positioning the stage at a pre-scan position, prior to positioning the stage at a first position, to enable a high-current beam to charge a first surface area at a pre-scan time prior to a first time.   
     
     
         32 . The charged particle multi-beam system of  claim 24 , wherein the controller is further configured to:
 positioning the stage at a pre-scan position, prior to positioning the stage at a first position, to enable a first beam of the plurality of beams to pre-charge a first surface area of the wafer, and   continuously moving the stage to position the stage at the first position to enable a second beam of the plurality of beams to scan the first surface area to generate an image associated with the first surface area.   
     
     
         33 . A non-transitory computer readable medium that stores a set of instructions that is executable by at least one processor of a computing device to cause the computing device to perform a method of inspecting a wafer, the method comprising:
 adjusting a time between a plurality of scans of a pixel on a wafer by adjusting a deflection rate of a deflection scanning unit, wherein the deflection scanning unit is configured to deflect a plurality of beams that scan the pixel; and   scanning the pixel using the plurality of beams, wherein each scan occurs at a different time by a different beam of the plurality of beams scanning the pixel.   
     
     
         34 . The non-transitory computer readable medium of  claim 33 , wherein the set of instructions that is executable by at least one processor of a computing device to cause the computing device to further perform:
 adjusting a beam current of a beam of the plurality of beams, wherein the scanning of the pixel comprises scanning the pixel at multiple beam currents.   
     
     
         35 . The non-transitory computer readable medium of  claim 34 , wherein the set of instructions that is executable by at least one processor of a computing device to cause the computing device to further perform:
 causing a beam current of each of the plurality of beams to remain constant during the scan.   
     
     
         36 . The non-transitory computer readable medium of  claim 34 , wherein the set of instructions that is executable by at least one processor of a computing device to cause the computing device to further perform:
 constructing voltage contrast images of the pixel on the wafer corresponding to each of the plurality of beams that scan the pixel; and   comparing the voltage contrast images corresponding to each of the plurality of beams that scan the pixel to enable detecting whether a defect is identified in the pixel on the wafer.