Low aspect ratio interconnect
Abstract
A low aspect ratio interconnect is provided and includes a metallization layer, a liner and a metallic interconnect. The metallization layer includes bottommost and uppermost surfaces. The uppermost surface has a maximum post-deposition height from the bottommost surface at first metallization layer portions. The metallization layer defines a trench at second metallization layer portions. The liner includes is disposed to line the trench and includes liner sidewalls that have terminal edges that extend to the maximum post-deposition height and lie coplanar with the uppermost surface at the first metallization layer portions. The metallic interconnect is disposed on the liner to fill a trench remainder and has an uppermost interconnect surface that extends to the maximum post-deposition height and lies coplanar with the uppermost surface at the first metallization layer portions.
Claims
exact text as granted — not AI-modified1 .- 20 . (canceled)
21 . A device comprising a plurality of metallization levels, at least one metallization level comprising:
a first portion comprising an ultra low-k dielectric (ULK) comprising a first surface and a second surface; a second portion comprising:
a trench in the ULK;
a liner disposed on the trench, the liner comprising liner sidewalls; and
a metallic interconnect disposed on the liner to fill a remainder of the trench,
wherein the second surface of the first portion is coplanar with terminal edges of the liner sidewalls and an upper surface of the metallic interconnect.
22 . The device of claim 21 , wherein the liner comprises a first layer comprising a first material.
23 . The device of claim 22 , wherein the first material comprises at least one of tantalum, tantalum nitride, cobalt, or ruthenium.
24 . The device of claim 22 , wherein the liner further comprises a second layer comprising a second material.
25 . The device of claim 24 , wherein at least one of the first material or the second material comprises at least one of tantalum, tantalum nitride, cobalt, or ruthenium.
26 . The device of claim 25 , wherein the first material is different from the second material.
27 . The device of claim 21 , wherein the metallic interconnect comprises copper.
28 . The device of claim 21 , wherein the metallic interconnect comprises cobalt.
29 . The device of claim 21 , wherein the metallic interconnect comprises ruthenium.
30 . A device comprising a plurality of metallization levels, at least one metallization level comprising:
a first portion comprising an ultra low-k dielectric (ULK) comprising a first surface and a second surface, the second surface having a maximum post-deposition height from the first surface; a second portion comprising: a trench in the ULK; a liner disposed on the trench, the liner comprising liner sidewalls having terminal edges that extend to the maximum post-deposition height; and a metallic interconnect disposed on the liner to fill a remainder of the trench, wherein the second surface of the first portion is coplanar with the terminal edges of the liner sidewalls and an upper surface of the metallic interconnect.
31 . The device of claim 30 , wherein the liner comprises a first layer comprising a first material.
32 . The device of claim 31 , wherein the first material comprises at least one of tantalum, tantalum nitride, cobalt, or ruthenium.
33 . The device of claim 31 , wherein the liner further comprises a second layer comprising a second material.
34 . The device of claim 33 , wherein at least one of the first material or the second material comprises at least one of tantalum, tantalum nitride, cobalt, or ruthenium.
35 . The device of claim 34 , wherein the first material is different from the second material.
36 . The device of claim 30 , wherein the metallic interconnect comprises copper.
37 . The device of claim 30 , wherein the metallic interconnect comprises cobalt.
38 . The device of claim 30 , wherein the metallic interconnect comprises ruthenium.Join the waitlist — get patent alerts
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