Semiconductor chip assembly and method for making same

Abstract

A microelectronic assembly may include a substrate including a rigid dielectric layer having electrically conductive elements, a microelectronic element having a plurality of contacts exposed at a face thereof, and conductive vias extending through a compliant dielectric layer overlying the rigid dielectric layer. The vias electrically connect the substrate contacts respectively to the conductive elements, and the substrate contacts are joined respectively to the contacts of the microelectronic element. The vias, compliant layer and substrate contacts are adapted to appreciably relieve stress at the substrate contacts associated with differential thermal contact and expansion of the assembly.

What is claimed is: 
     
         1 . A microelectronic assembly comprising:
 a substrate including
 a dielectric element having first and second opposed surfaces, a first dielectric layer having a first material structure adjacent the first surface, and a second dielectric layer having a second material structure different from the first material structure, the second dielectric layer disposed between the first dielectric layer and the second surface, the first dielectric layer having a Your modulus less than two gigapascal (GPa), wherein a Young's modulus of the second dielectric layer is at least 50% greater than the Young's modulus of the first dielectric layer; 
 a plurality of substrate contacts at the first surface; 
 a plurality of terminals at the second surface; and 
 a conductive structure extending through the first and second dielectric layers and electrically connecting the substrate contacts with the terminals; 
   a microelectronic element having a face confronting the first surface and a plurality of element contacts thereon joined with the substrate contacts through conductive masses; and   a rigid underfill between the face of the microelectronic element and the first surface,   wherein the terminals are usable for bonding the microelectronic assembly to corresponding contacts of a component external to the microelectronic assembly.   
     
     
         2 . The microelectronic assembly of  claim 1 , wherein the terminals include first and second substantially rigid solid metal posts adapted to simultaneously carry respective first and second electrical signal potentials, the first and second potentials being different. 
     
     
         3 . The microelectronic assembly of  claim 1 , wherein the terminals are portions of a conductive layer at the second surface of the dielectric element. 
     
     
         4 . The microelectronic assembly of  claim 1  further comprising:
 bonding material between the terminals and the external component joining the terminals to the external component. 
 
     
     
         5 . The microelectronic assembly of  claim 4 , wherein the bonding material is solder and the external component is a circuit panel. 
     
     
         6 . The microelectronic assembly of  claim 1 , wherein the second dielectric layer has a Young's modulus of at least two gigapascal (GPa). 
     
     
         7 . The microelectronic assembly of  claim 1 , wherein the dielectric element includes a third dielectric layer disposed between the second surface and the second dielectric layer, the third dielectric layer having a third material structure different from the second material structure, the second dielectric layer having the Young's modulus at least 50% greater than a Young's modulus of the third dielectric layer, the third dielectric layer having a Young's modulus less than 2 GPa, and
 wherein the conductive structure extends through the third dielectric layer.   
     
     
         8 . The microelectronic assembly of  claim 7 , wherein the conductive structure includes conductive traces extending parallel to at least one of the first surface or the second surface. 
     
     
         9 . The microelectronic assembly of  claim 8 , wherein the conductive traces include traces extending along at least one of the first surface or the second surface. 
     
     
         10 . The microelectronic assembly of  claim 8 , wherein the conductive traces include traces disposed between the first surface and the second surface. 
     
     
         11 . The microelectronic assembly of  claim 10 , wherein the conductive traces include traces extending along at least one of a boundary between the first dielectric layer and the second dielectric layer or a boundary between the second dielectric layer and the third dielectric layer. 
     
     
         12 . The microelectronic assembly of  claim 8 , wherein the conductive structure includes conductive vies extending through the first, second and third dielectric layers, at least some of the vias extending from the traces. 
     
     
         13 . The microelectronic assembly of  claim 7  further comprising:
 a solder mask at at least one of the first surface or the second surface. 
 
     
     
         14 . The microelectronic assembly of  claim 7 , wherein at least one of the terminals is a substantially rigid solid metal post. 
     
     
         15 . The microelectronic assembly of  claim 14  further comprising: solder joined to the at least one metal post. 
     
     
         16 . The microelectronic assembly of  claim 7 , wherein the terminals include first and second substantially rigid solid metal posts adapted to simultaneously carry respective first and second electrical signal potentials, the first and second potentials being different. 
     
     
         17 . The microelectronic assembly of  claim 7 , wherein the terminals are portions of a conductive layer at the second surface of the dielectric element. 
     
     
         18 . The microelectronic assembly of  claim 7  further comprising:
 bonding material between the terminals and the external component joining the terminals to the external component. 
 
     
     
         19 . A microelectronic assembly comprising:
 a substrate including
 a dielectric element having first and second opposed surfaces, a first dielectric layer having a first material structure adjacent the first surface and a second dielectric layer having a second material structure different from the first material structure, the second dielectric layer disposed between the first dielectric layer and the second surface, the first dielectric layer having a Young's modulus less than two gigapascal (GPa), wherein a Young's modulus of the second dielectric layer is at least 50% greater than the Young's modulus of the first dielectric layer; 
 a plurality of substrate contacts at the first surface; 
 a plurality of terminals at the second surface; and 
 a conductive structure extending through the first and second dielectric layers and electrically connecting the substrate contacts with the terminals; 
   a microelectronic element having a face confronting the first surface and a plurality of element contacts thereon joined with the substrate contacts through conductive masses; and   a rigid underfill between the face of the microelectronic element and the first surface,   wherein the terminals are usable for bonding the microelectronic assembly to corresponding contacts of a component external to the microelectronic assembly such that the substrate contacts are movable with respect to the terminals.   
     
     
         20 . The system as claimed in  claim 19 , further comprising a housing, the assembly and the other electronic components being mounted to the housing.