Integrated devices with photoemissive structures

Abstract

An apparatus is disclosed for the examination and inspection of integrated devices such as integrated circuits. X-rays are transmitted through the integrated device, and are incident on a photoemissive structure that absorbs x-rays and emits electrons. The electrons emitted by the photoemissive structure are shaped by an electron optical system to form a magnified image of the emitted electrons on a detector. This magnified image is then recorded and processed. For some embodiments of the invention, the photoemissive structure is deposited directly onto the integrated device. In some embodiments, the incidence angle of the x-rays is varied to allow internal three-dimensional structures of the integrated device to be determined. In other embodiments, the recorded image is compared with a reference data to enable inspection for manufacturing quality control.

I claim: 
     
         1 . An integrated device, on which
 a photoemissive structure has been manufactured.   
     
     
         2 . The device of  claim 1 , in which
 the photoemissive structure comprises material containing gold.   
     
     
         3 . The device of  claim 2 , in which
 the photoemissive structure comprises a layer of gold having a thickness between 5 nm and 100 nm.   
     
     
         4 . The device of  claim 1 , in which
 the photoemissive structure comprises material containing cesium iodide (CsI).   
     
     
         5 . The device of  claim 4 , in which
 the material containing cesium iodide (CsI) comprises a layer of cesium iodide having a thickness between 3 nm and 200 nm.   
     
     
         6 . The device of  claim 1 , in which
 a planarization layer is manufactured between the integrated device and the photoemissive structure.   
     
     
         7 . The device of  claim 1 , in which
 the integrated device is an integrated circuit.   
     
     
         8 . The device of  claim 1 , in which
 the integrated device is a silicon interposer with through-silicon-vias.   
     
     
         9 . An object comprising an integrated circuit, additionally comprising:
 a photoemissive structure that has been deposited onto the object comprising the integrated circuit,   in which the photoemissive structure comprises:   a photoemissive layer and an emissive coating.   
     
     
         10 . The object of  claim 9 , in which
 the thickness of the photoemissive layer is 100 nm or less; and   the thickness of the emissive coating is 100 nm or less.   
     
     
         11 . The object of  claim 9 , in which
 the photoemissive layer is a layer comprising gold, and   the emissive coating comprises a layer of cesium iodide (CsI) deposited onto the photoemissive layer.   
     
     
         12 . The object of  claim 9 , in which the object
 additionally comprises a planarization layer placed between the integrated device and the photoemissive structure   
     
     
         13 . The object of  claim 9 , in which
 the integrated circuit has been fabricated on a silicon substrate, and   the silicon substrate has been thinned to have a thickness of 50 microns or less.   
     
     
         14 . The object of  claim 13 , in which
 the photoemissive structure is deposited onto the object after the silicon substrate has been thinned.   
     
     
         15 . A method of preparing an object comprising an integrated circuit for examination in an x-ray photoemission microscope, comprising:
 depositing a photoemissive structure onto the object comprising the integrated circuit,   in which the photoemissive structure comprises:   a photoemissive layer and an emissive coating.   
     
     
         16 . The method of  claim 15 , in which
 the thickness of the photoemissive layer is 100 nm or less; and   the thickness of the emissive coating is 100 nm or less.   
     
     
         17 . The method of  claim 15 , in which
 the deposition of the photoemissive structure comprises:   depositing a layer of material comprising gold to serve as the photoemissive layer; and   depositing a layer of material comprising cesium iodide (CsI) onto the layer of material comprising gold to serve as the emissive coating.   
     
     
         18 . The method of  claim 15 , additionally comprising
 the deposition of a planarization layer placed between the integrated device and the photoemissive structure.   
     
     
         19 . The method of  claim 16 , in which
 the integrated circuit has been fabricated on a silicon substrate, and in which said method additionally comprises the step of:   thinning the silicon substrate to have a thickness of 50 microns or less.   
     
     
         20 . The method of  claim 19 , in which
 the photoemissive structure is deposited onto the object after the silicon substrate has been thinned.