Dual Plasma Volume Processing Apparatus for Neutral/Ion Flux Control

Abstract

A semiconductor wafer processing apparatus includes a first electrode exposed to a first plasma generation volume, a second electrode exposed to a second plasma generation volume, and a gas distribution unit disposed between the first and second plasma generation volumes. The first electrode is defined to transmit radiofrequency (RF) power to the first plasma generation volume, and distribute a first plasma process gas to the first plasma generation volume. The second electrode is defined to transmit RF power to the second plasma generation volume, and hold a substrate in exposure to the second plasma generation volume. The gas distribution unit includes an arrangement of through-holes defined to fluidly connect the first plasma generation volume to the second plasma generation volume. The gas distribution unit also includes an arrangement of gas supply ports defined to distribute a second plasma process gas to the second plasma generation volume.

What is claimed is: 
     
         1 . A semiconductor wafer processing apparatus, comprising:
 an electrostatic chuck having a top surface configured to hold a substrate;   a gas distribution unit positioned above and spaced apart from the electrostatic chuck, the gas distribution unit having a bottom surface oriented in a substantially parallel orientation with the top surface of the electrostatic chuck, a space between the top surface of the electrostatic chuck and the bottom surface of the gas distribution unit forming a lower plasma generation volume, the gas distribution unit configured to receive and distribute a process gas to the lower plasma generation volume, the gas distribution unit including an arrangement of through-holes extending from the bottom surface of the gas distribution unit to a top surface of the gas distribution unit;   an outer lower structural member configured to circumscribe the gas distribution unit and support the gas distribution unit in its position above and spaced apart from the electrostatic chuck;   a showerhead electrode positioned above and spaced apart from the gas distribution unit, the showerhead electrode having a bottom surface oriented in a substantially parallel orientation with the top surface of the gas distribution unit, a space between the bottom surface of the showerhead electrode and the top surface of the gas distribution unit forming an upper plasma generation volume;   an outer upper structural member configured to circumscribe the showerhead electrode and support the showerhead electrode in its position above and spaced apart from the gas distribution unit;   an exhaust channel configured to extend in a radial direction outward from a perimeter of the upper plasma generation volume, the exhaust channel configured to circumscribe the upper plasma generation volume and extend radially outward between the outer upper structural member and the outer lower structural member; and   a throttle ring configured to move vertically within a conformally defined recessed region within the outer upper structural member so as to extend vertically into the exhaust channel by a controlled amount of distance.   
     
     
         2 . The semiconductor wafer processing apparatus as recited in  claim 1 , wherein the exhaust channel is configured to have a substantially uniform vertical height along its extent in the radial direction with an exception of a location beneath the throttle ring. 
     
     
         3 . The semiconductor wafer processing apparatus as recited in  claim 1 , further comprising:
 a first insulating ring configured to circumscribe an outer perimeter of the showerhead electrode, the first insulating ring disposed within a horizontal slot formed within the outer upper structural member, the first insulating ring configured to extend along a portion of a vertical height of the showerhead electrode, the first insulating ring configured to physically contact the outer perimeter of the showerhead electrode.   
     
     
         4 . The semiconductor wafer processing apparatus as recited in  claim 3 , wherein the first insulating ring has a tapered bottom surface extending downward and away from the bottom surface of the showerhead electrode. 
     
     
         5 . The semiconductor wafer processing apparatus as recited in  claim 3 , further comprising:
 a second insulating ring configured to circumscribe the outer perimeter of the showerhead electrode, the second insulating ring disposed on a top surface of the first insulating ring, the second insulating ring positioned between the outer perimeter of the showerhead electrode and the outer upper structural member, the second insulating ring configured to extend along a remainder of the vertical height of the showerhead electrode located above the first insulating ring, the second insulating ring positioned to contact both the showerhead electrode and the outer upper structural member.   
     
     
         6 . The semiconductor wafer processing apparatus as recited in  claim 1 , wherein a first portion of the arrangement of through-holes extend from the bottom surface of the gas distribution unit to the top surface of the gas distribution unit in an angled direction relative to a reference direction that extends perpendicularly between the top and bottom surfaces of the gas distribution unit. 
     
     
         7 . The semiconductor wafer processing apparatus as recited in  claim 6 , wherein an angle of the first portion of the arrangement of through-holes relative to the reference direction is sufficiently large to prevent an uninterrupted line-of-sight in the reference direction through the gas distribution unit. 
     
     
         8 . The semiconductor wafer processing apparatus as recited in  claim 6 , wherein a second portion of the arrangement of through-holes extend from the bottom surface of the gas distribution unit to the top surface of the gas distribution unit in the reference direction. 
     
     
         9 . The semiconductor wafer processing apparatus as recited in  claim 8 , wherein the first and second portions of the arrangement of through-holes are distributed in a substantially uniformly mixed manner across the gas distribution unit. 
     
     
         10 . The semiconductor wafer processing apparatus as recited in claim wherein the throttle ring is configured to provide a complete shutoff of flow from the upper plasma generation volume through the exhaust channel when the throttle ring is fully lowered into the exhaust channel. 
     
     
         11 . The semiconductor wafer processing apparatus as recited in  claim 1 , wherein the outer lower structural member is rigidly connected to the electrostatic chuck. 
     
     
         12 . The semiconductor wafer processing apparatus as recited in  claim 11 , wherein the outer lower structural member includes an upper horizontal portion, a lower horizontal portion, and a vertical portion extending between the lower horizontal portion and the upper horizontal portion, and wherein the upper horizontal portion is sealed against an outer perimeter of the gas distribution unit, and wherein the lower horizontal portion is sealed against an outer perimeter of the electrostatic chuck, and wherein each of the upper horizontal portion, the lower horizontal portion, and the vertical portion of the outer lower structural member forms an impermeable barrier except for a set of slotted exhaust channels formed through the lower horizontal portion, wherein the set of slotted exhaust channels form fluid flow pathways out of the lower plasma generation volume. 
     
     
         13 . The semiconductor wafer processing apparatus as recited in  claim 12 , further comprising:
 a pressure control ring disposed below the set of slotted exhaust channels, the pressure control ring configured as a horizontally oriented annular-shaped solid disc that is movable in a controlled manner in a vertical direction toward and away from the set of slotted exhaust channels.   
     
     
         14 . The semiconductor wafer processing apparatus as recited in  claim 13 , wherein the pressure control ring is configured to provide a complete shutoff of flow from the lower plasma generation volume through the set of slotted exhaust channels when the pressure control ring is fully raised to contact the lower horizontal portion of the outer lower structural member. 
     
     
         15 . A method for processing a semiconductor wafer, comprising:
 placing a semiconductor wafer on a top surface of an electrostatic chuck within a semiconductor wafer processing apparatus, wherein the semiconductor wafer process apparatus includes:
 a gas distribution unit positioned above and spaced apart from the electrostatic chuck, the gas distribution unit having a bottom surface oriented in a substantially parallel orientation with the top surface of the electrostatic chuck, a space between the top surface of the electrostatic chuck and the bottom surface of the gas distribution unit forming a lower plasma generation volume, the gas distribution unit configured to receive and distribute a process gas to the lower plasma generation volume, the gas distribution unit including an arrangement of through-holes extending from the bottom surface of the gas distribution unit to a top surface of the gas distribution unit, and 
 an outer lower structural member configured to circumscribe the gas distribution unit and support the gas distribution unit in its position above and spaced apart from the electrostatic chuck, and 
 a showerhead electrode positioned above and spaced apart from the gas distribution unit, the showerhead electrode having a bottom surface oriented in a substantially parallel orientation with the top surface of the gas distribution unit, a space between the bottom surface of the showerhead electrode and the top surface of the gas distribution unit forming an upper plasma generation volume, and 
 an outer upper structural member configured to circumscribe the showerhead electrode and support the showerhead electrode in its position above and spaced apart from the gas distribution unit, and 
 an exhaust channel configured to extend in a radial direction outward from a perimeter of the upper plasma generation volume, the exhaust channel configured to circumscribe the upper plasma generation volume and extend radially outward between the outer upper structural member and the outer lower structural member, and 
 a throttle ring configured to move vertically within a conformally defined recessed region within the outer upper structural member so as to extend vertically into the exhaust channel by a controlled amount of distance; 
   operating the electrostatic chuck to hold the substrate;   flowing a first process gas through the showerhead electrode into the upper plasma generation volume;   supplying radiofrequency power to the showerhead electrode to transform the first process gas into a plasma within the upper plasma generation volume, wherein reactive constituents of the plasma within the upper plasma generation volume travel through the arrangement of through-holes within the gas distribution unit and into the lower plasma generation volume;   flowing a second process gas through the gas distribution unit into the lower plasma generation volume; and   supplying radiofrequency power to the electrostatic chuck to transform the second process gas into a plasma within the lower plasma generation volume.   
     
     
         16 . The method as recited in  claim 15 , further comprising:
 controlling a vertical position of the throttle ring within the conformally defined recessed region within the outer upper structural member so as to control an amount of flow from the upper plasma generation volume through the exhaust channel.   
     
     
         17 . The method as recited in  claim 16 , further comprising:
 operating a pressure manometer to measure a pressure within the upper plasma generation volume;   generating feedback signals for controlling the vertical position of the throttle ring; and   using the generated feedback signals to control the vertical position of the throttle ring to provide active control of the pressure within the upper plasma generation volume.   
     
     
         18 . The method as recited in  claim 15 , wherein the outer lower structural member includes a set of slotted exhaust channels that form fluid flow pathways out of the lower plasma generation volume, and wherein the semiconductor wafer process apparatus includes a pressure control ring disposed below the set of slotted exhaust channels, the pressure control ring configured as a horizontally oriented annular-shaped solid disc that is movable in a controlled manner in a vertical direction toward and away from the set of slotted exhaust channels, the method further comprising controlling a vertical position of the pressure control ring so as to control an amount of flow from the lower plasma generation volume through the set of slotted exhaust channels. 
     
     
         19 . The method as recited in  claim 18 , further comprising:
 fully lowering the throttle ring within the exhaust channel to shut off flow from the upper plasma generation volume through the exhaust channel, such that exhaust from the upper plasma generation volume is forced to flow through the arrangement of through-holes within the gas distribution unit and through the lower plasma generation volume and through the set of slotted exhaust channels past the pressure control ring.   
     
     
         20 . The method as recited in  claim 18 , further comprising:
 fully raising the pressure control ring to contact the outer lower structural member to shut off flow from the lower plasma generation volume through the set of slotted exhaust channels, such that exhaust from the lower plasma generation volume is forced to flow through the arrangement of through-holes within the gas distribution unit and through the upper plasma generation volume and through the exhaust channel past the throttle ring.