Semiconductor Devices and Methods of Manufacture Thereof

Abstract

Semiconductor devices and methods of manufacture thereof are disclosed. In some embodiments, a semiconductor device includes a first semiconductor chip including a first substrate and a first conductive feature formed over the first substrate, and a second semiconductor chip bonded to the first semiconductor chip. The second semiconductor chip includes a second substrate and a second conductive feature formed over the second substrate. A conductive plug is disposed through the first conductive feature and is coupled to the second conductive feature. The conductive plug includes a first portion disposed over the first conductive feature, the first portion having a first width, and a second portion disposed beneath or within the first conductive feature. The second portion has a second width. The first width is greater than the second width.

1 . A semiconductor device, comprising:
 a first semiconductor chip including a first substrate and a first conductive feature formed over the first substrate;   a second semiconductor chip bonded to the first semiconductor chip, the second semiconductor chip including a second substrate and a second conductive feature formed over the second substrate; and   a conductive plug disposed through the first conductive feature and coupled to the second conductive feature, wherein the conductive plug comprises:
 a first portion disposed over the first conductive feature, the first portion comprising a first width; and 
 a second portion disposed beneath or within the first conductive feature, the second portion comprising a second width, wherein the first width is greater than the second width, and wherein the first conductive feature comprises a hard mask for a formation of the second portion of the conductive plug. 
   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the conductive plug further comprises a third portion disposed between the first portion and the first conductive feature, the third portion comprising a third width, and wherein the third width is greater than the second width and less than the first width. 
     
     
         3 . (canceled) 
     
     
         4 . The semiconductor device according to  claim 1 , wherein the first conductive feature or the second conductive feature comprises a contact, a conductive line, or a portion of a redistribution layer (RDL). 
     
     
         5 . The semiconductor device according to  claim 1 , wherein the first conductive feature comprises an opening therein, and wherein the second portion of the conductive plug is disposed beneath the opening in the first conductive feature. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein the first conductive feature comprises a conductive line in a bottom metallization layer of the first semiconductor chip, a top metallization layer of the first semiconductor chip, or a metallization layer disposed between a bottom metallization layer and a top metallization layer of the first semiconductor chip. 
     
     
         7 . The semiconductor device according to  claim 1 , wherein the second conductive feature comprises a conductive line in a bottom metallization layer of the second semiconductor chip, a top metallization layer of the second semiconductor chip, or a metallization layer disposed between a bottom metallization layer and a top metallization layer of the second semiconductor chip. 
     
     
         8 . A semiconductor device, comprising:
 a first semiconductor chip including a first substrate and a first conductive feature formed over the first substrate, the first conductive feature being disposed in a contact layer, a conductive line layer, or a redistribution layer (RDL) of the first semiconductor chip;   a second semiconductor chip bonded to the first semiconductor chip, the second semiconductor chip including a second substrate and a second conductive feature formed over the second substrate, the second conductive feature being disposed in a contact layer, a conductive line layer, or an RDL of the second semiconductor chip; and   a conductive plug disposed through the first conductive feature and coupled to the second conductive feature, wherein the conductive plug comprises:
 a first portion disposed over the first conductive feature, the first portion comprising a first width; 
 a second portion disposed beneath or within the first conductive feature, the second portion comprising a second width, the first width being greater than the second width; and 
 a third portion disposed between the first portion and the first conductive feature, the third portion comprising a third width, wherein the third width is greater than the second width and less than the first width. 
   
     
     
         9 . The semiconductor device according to  claim 8 , wherein the first semiconductor chip or the second semiconductor chip comprises an application specific integrated circuit (ASIC) device or a system-on-a-chip (SOC). 
     
     
         10 . The semiconductor device according to  claim 8 , wherein the semiconductor device comprises a complementary metal oxide semiconductor (CMOS) image sensor device. 
     
     
         11 . The semiconductor device according to  claim 8 , wherein the conductive plug is disposed within an inter-metal dielectric (IMD) of the first semiconductor chip or the second semiconductor chip. 
     
     
         12 . The semiconductor device according to  claim 8 , wherein the first conductive feature, the second conductive feature, or the conductive plug comprises a material selected from the group consisting essentially of W, Cu, AlCu, polysilicon, and combinations thereof. 
     
     
         13 . The semiconductor device according to  claim 8 , wherein the first portion of the conductive plug is disposed within the first substrate of the first semiconductor chip. 
     
     
         14 . The semiconductor device according to  claim 8 , wherein a portion of the conductive plug is disposed within the first conductive feature or the second conductive feature. 
     
     
         15 . A method of manufacturing a semiconductor device, the method comprising:
 providing a first semiconductor chip and a second semiconductor chip bonded to the first semiconductor chip, the first semiconductor chip including a first substrate and a first conductive feature formed over the first substrate, the second semiconductor chip including a second substrate and a second conductive feature formed over the second substrate; and   forming a conductive plug disposed through the first conductive feature and coupled to the second conductive feature, wherein the conductive plug comprises a first portion disposed over the first conductive feature, the first portion comprising a first width, and wherein the conductive plug further comprises a second portion disposed beneath or within the first conductive feature, the second portion comprising a second width, wherein the first width is greater than the second width, and wherein forming the second portion of the conductive plug comprises using the first conductive feature as a hard mask.   
     
     
         16 . (canceled) 
     
     
         17 . The method according to  claim 15 , wherein the first conductive feature comprises a contact, a conductive line, or a portion of a redistribution layer (RDL). 
     
     
         18 . The method according to  claim 15 , wherein the second conductive feature comprises a contact, a conductive line, or a portion of a redistribution layer (RDL). 
     
     
         19 . The method according to  claim 15 , wherein the first conductive feature, the second conductive feature, or the conductive plug comprises a material selected from the group consisting essentially of W, Cu, AlCu, polysilicon, and combinations thereof. 
     
     
         20 . The method according to  claim 15 , wherein forming the conductive plug further comprises forming a conductive plug including a third portion disposed between the first portion and the first conductive feature, the third portion comprising a third width, and wherein the third width is greater than the second width and less than the first width. 
     
     
         21 . The method according to  claim 15 , wherein forming the conductive plug comprises using a single mask pattern for forming the first portion and the second portion. 
     
     
         22 . The method according to  claim 15 , wherein forming the conductive plug comprises forming a recess in a top surface of the first conductive feature.