Stack packages using reconstituted wafers

Abstract

A stacked microelectronic unit is provided which has a top surface and a bottom surface remote from the top surface and a plurality of vertically stacked microelectronic elements therein, including at least one microelectronic element having a front face adjacent to the top surface and a rear face oriented towards the bottom surface. Each of the microelectronic elements has traces extending from contacts at the front face beyond edges of the microelectronic element. A dielectric layer contacts edges of the microelectronic elements and underlies the rear face of the at least one microelectronic element. Leads are connected to the traces extending along the dielectric layer. Unit contacts, exposed at the top surface, are connected to the leads.

1 . A method of fabricating a stacked microelectronic assembly, comprising:
 a) providing first and second subassemblies, each subassembly having a front surface and a rear surface remote from the front surface, each subassembly including a plurality of spaced apart microelectronic elements having front faces and contacts adjacent to the front surface, rear faces adjacent to the rear surface, and edges extending between the front and rear faces;   b) forming a plurality of traces at the front surface of the first subassembly, the traces extending from the contacts of the first subassembly to beyond the edges of the microelectronic elements of the first subassembly;   c) joining the first and second subassemblies such that the rear surface of the second subassembly confronts the front surface of the first subassembly;   d) forming a plurality of traces at the front surface of the second subassembly, the traces extending from the contacts of the second subassembly to beyond the edges of the microelectronic elements of the second subassembly; and   e) forming leads in at least one opening extending between edges of adjacent microelectronic elements of the first and second subassemblies, the leads being connected to the traces of the microelectronic elements of the first and second subassemblies.   
     
     
         2 . A method as claimed in  claim 1 , wherein each of the microelectronic elements of the first and second subassemblies has a thickness of less than about 50 microns between the front face and the rear face. 
     
     
         3 . A method as claimed in  claim 1 , wherein at least one of the microelectronic elements includes flash memory. 
     
     
         4 . A method of making a stacked microelectronic unit including the method as claimed in  claim 1 , further comprising, after step (e), severing the stacked microelectronic assembly between edges of adjacent microelectronic elements into a plurality of stacked microelectronic units, each unit including microelectronic elements from each of the first and second subassemblies and leads connected to traces of the microelectronic elements. 
     
     
         5 . A method as claimed in  claim 1 , wherein the at least one opening includes channels extending between confronting edges of adjacent microelectronic elements. 
     
     
         6 . A method as claimed in  claim 4 , wherein the at least one opening includes a plurality of spaced apart openings aligned with edges of the microelectronic elements and leads of each stacked microelectronic unit extend within respective individual ones of the spaced apart openings, each lead being conductively connected with a single one of the traces. 
     
     
         7 . A method as claimed in  claim 1 , wherein the front face of a given microelectronic element of the second subassembly has at least one dimension different from a corresponding dimension of the front face of a microelectronic element of the first subassembly that the front face of the given microelectronic element overlies. 
     
     
         8 . A method as claimed in  claim 1 , wherein a front face of a given microelectronic element of the first subassembly has at least one dimension different from a corresponding dimension of a front face of another microelectronic element of the first subassembly. 
     
     
         9 . A method as claimed in  claim 8 , wherein a front face of a given microelectronic element within the stacked assembly has at least substantially the same dimensions as a front face of another microelectronic element that the given microelectronic element overlies within the stacked assembly. 
     
     
         10 . A method as claimed in  claim 1 , wherein each subassembly further includes alignment features adjacent to the front surface, the alignment features and the traces being elements of a metal layer exposed at the front surface. 
     
     
         11 . A method as claimed in  claim 1 , wherein step (c) includes joining the second subassembly to the first subassembly such that edges of microelectronic elements of the second subassembly are displaced in a lateral direction relative to edges of microelectronic elements of the first subassembly in vertical alignment therewith, and the opening formed in step (e) has a sloped wall exposing the traces adjacent to the laterally displaced edges of the vertically stacked microelectronic elements. 
     
     
         12 . A method as claimed in  claim 11 , wherein the lateral direction is a first lateral direction, the edges of each microelectronic element include first edges and second edges transverse to the first edges, and step (c) includes joining the second subassembly to the first subassembly such that second edges of microelectronic elements of the second subassembly are further displaced in a second lateral direction relative to second edges of microelectronic elements of the first subassembly in vertical alignment therewith, the second lateral direction being transverse to the first lateral direction, the method further comprising forming a second opening having a sloped wall exposing second traces adjacent to the second edges, and forming leads connected to the second traces. 
     
     
         13 . A stacked microelectronic unit, the stacked unit having a top surface and a bottom surface remote from the top surface, the stacked unit comprising:
 a plurality of vertically stacked microelectronic elements including at least one microelectronic element having a front face adjacent to the top surface and having a rear face oriented towards the bottom surface, each of the microelectronic elements having traces extending from contacts at the front face beyond edges of the microelectronic element;   a dielectric layer contacting the edges of the microelectronic elements and underlying the rear face of the at least one microelectronic element;   leads connected to the traces extending along the dielectric layer; and   unit contacts connected to the leads, the unit contacts being exposed at the top surface.   
     
     
         14 . A microelectronic stacked unit as claimed in  claim 13 , further comprising at least some bottom unit contacts exposed at the bottom surface, the bottom unit contacts being connected to the contacts of at least one of the microelectronic elements. 
     
     
         15 . A stacked microelectronic unit, comprising:
 a first microelectronic element having a front face bounded by a first edge and a second edge remote from the first edge;   a second microelectronic element having a front face bounded by a first edge and a second edge remote from the first edge, wherein the first edge of the second microelectronic element overlies the front face of the first microelectronic element and the first edge of the first microelectronic element extends beyond the first edge of the second microelectronic element;   a dielectric layer overlying the first edges of the first and second microelectronic elements, the dielectric layer defining an edge of the stacked unit; and   leads connected to traces at the front faces of the first and second microelectronic elements, the leads extending along the edge of the stacked unit.   
     
     
         16 . A stacked microelectronic unit as claimed in  claim 15 , wherein the first and second microelectronic elements include third edges oriented in a direction transverse to the first edges, wherein the third edge of the second microelectronic element overlies the front face of the first microelectronic element and the third edge of the first microelectronic element extends beyond the third edge of the second microelectronic element, the dielectric layer defines a second edge of the stacked unit overlying the third edges of the microelectronic elements, and the stacked unit further includes second leads extending along the second edge of the stacked unit. 
     
     
         17 . A stacked microelectronic unit, comprising:
 a first microelectronic element having a front face bounded by a first edge and a second edge remote from the first edge;   a second microelectronic element having a front face bounded by a first edge and a second edge remote from the first edge, wherein the front face of the second microelectronic element overlies the front face of the first microelectronic element and the front faces of the first and second microelectronic elements differ in at least one of length along the front faces in a longitudinal direction or in width along the front faces in a lateral direction transverse to the longitudinal direction;   a dielectric layer overlying the first edges of the first and second microelectronic elements, the dielectric layer defining an edge of the stacked unit; and   leads connected to traces at front faces of the microelectronic elements, the leads extending along the edge of the stacked unit.