US2013157543A1PendingUtilityA1

Polishing Pad and Method For Polishing A Semiconductor Wafer

Assignee: SILTRONIC AGPriority: Jun 24, 2009Filed: Feb 13, 2013Published: Jun 20, 2013
Est. expiryJun 24, 2029(~2.9 yrs left)· nominal 20-yr term from priority
H10P 90/129H10P 52/00B24B 37/0056B24D 13/147C09G 1/04B24D 11/00B24B 7/22B24D 3/28B24B 7/228B24B 37/22
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Claims

Abstract

A semiconductor wafer is polished, wherein in a first step, the rear side of the wafer is polished by a polishing pad comprising fixedly bonded abrasives having a grain size of 0.1-1.0 μm, while supplying a polishing agent free of solid materials having a pH of at least 11.8, and, in a second step, the front side of the semiconductor wafer is polished, wherein a polishing agent having a pH of less than 11.8 is supplied. A polishing pad for use in apparatuses for polishing semiconductor wafers, has a layer containing abrasives, a layer composed of a stiff plastic and also a compliant, non-woven layer, wherein the layers are bonded to one another by means of pressure-sensitive adhesive layers.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A polishing pad for use in apparatuses for polishing semiconductor wafers, comprising a layer containing abrasives, a layer composed of a stiff plastic and also a compliant, non-woven layer, wherein the layers are bonded to one another by means of pressure-sensitive adhesive layers. 
     
     
         2 . The polishing pad of  claim 1 , wherein the layer composed of a stiff plastic comprises a polycarbonate. 
     
     
         3 . The polishing pad of  claim 1 , wherein the polishing pad comprises an additional layer composed of polyurethane foam. 
     
     
         4 . The polishing pad of  claim 1 , wherein the compliant layer comprises polyester fibers. 
     
     
         5 . The polishing pad of  claim 1 , wherein the layer containing abrasives comprises particles of oxides of the elements cerium, aluminum, silicon or zirconium or particles of hard materials such as silicon carbide, boron nitride or diamond. 
     
     
         6 . The polishing pad of  claim 1 , wherein the layer containing abrasives is a layer containing microreplicated structures. 
     
     
         7 . The polishing pad of  claim 4 , wherein the compliant layer comprises non-woven polyester fibers impregnated with polyurethane. 
     
     
         8 . The polishing pad of  claim 1 , comprising the following layers, in order:
 a) a compliant layer;   b) optionally, a foam layer;   c) a stiff plastic layer; and   d) a fixed abrasive layer.   
     
     
         9 . The polishing pad of  claim 1 , comprising the following layers, in order:
 a) a foam layer;   b) a compliant layer;   c) a stiff plastic layer; and   d) a fixed abrasive layer.   
     
     
         10 . A process comprising polishing a semiconductor wafer by a polishing pad containing abrasives of  claim 1 .

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