Method of Multi-Chip Wafer Level Packaging

Abstract

A method of multi-chip wafer level packaging comprises forming a reconfigured wafer using a plurality of photo-sensitive material layers. A plurality of semiconductor chips and wafers are embedded in the photo-sensitive material layers. Furthermore, a variety of through assembly vias are formed in the photo-sensitive material layers. Each semiconductor chip embedded in the photo-sensitive material layers is connected to input/output pads through connection paths formed by the through assembly vias.

1 . A method comprising:
 attaching a first semiconductor die on a top side of a wafer;   attaching a second semiconductor die on the first semiconductor die;   forming a reconfigured wafer by embedding the first semiconductor die and the second semiconductor die into a first photo-sensitive material layer; and   forming a first group of through assembly vias in the first photo-sensitive material layer.   
     
     
         2 . The method of  claim 1 , further comprising:
 attaching the wafer on a base plane using an adhesive layer; and   detaching the base plane from the wafer.   
     
     
         3 . The method of  claim 1 , further comprising:
 attaching the second semiconductor die to the first semiconductor die using a first adhesive layer;   back-to-face attaching the first semiconductor die to the wafer using a second adhesive layer;   forming a first redistribution layer on top of the first photo-sensitive material layer; and   forming a plurality of solder balls on top of the first redistribution layer.   
     
     
         4 . The method of  claim 1 , further comprising:
 face-to-face attaching the second semiconductor die to the first semiconductor die using a plurality of metal bumps; and   face-to-face attaching the first semiconductor die to the wafer using a plurality of metal bumps.   
     
     
         5 . The method of  claim 1 , further comprising:
 forming a first group of openings between one side of the second semiconductor die and a front side of the first photo-sensitive material layer;   forming a second group of openings between one side of the first semiconductor die and the front side of the first photo-sensitive material layer; and   forming a third group of openings between one side of the wafer and the front side of the first photo-sensitive material layer.   
     
     
         6 . The method of  claim 5 , further comprising:
 electroplating conductive materials in the first group of openings;   electroplating conductive materials in the second group of openings; and   electroplating conductive materials in the third group of openings.   
     
     
         7 . The method of  claim 1 , further comprising:
 sawing the reconfigured wafer into a plurality of packages, wherein each package comprises a plurality of semiconductor dies.   
     
     
         8 . A method comprising:
 attaching a semiconductor die on a top side of a second wafer;   forming a first reconfigured wafer by embedding the second wafer and the semiconductor die into a first photo-sensitive material layer;   sawing the first reconfigured wafer into a plurality of multi-die structures;   attaching the plurality of multi-die structures on a top side of a first wafer;   forming a second reconfigured wafer by embedding the plurality of multi-die structures into a second photo-sensitive material layer; and   forming a first group of through assembly vias in the second photo-sensitive material layer.   
     
     
         9 . The method of  claim 8 , further comprising:
 attaching the first wafer on a first base plane using a first adhesive layer; and   detaching the first base plane from the first wafer.   
     
     
         10 . The method of  claim 8 , further comprising:
 attaching the semiconductor die to the second wafer using a third adhesive layer;   back-to-face attaching the plurality of multi-die structures to the first wafer using a fourth adhesive layer;   forming a first redistribution layer on top of the first photo-sensitive material layer;   forming a second redistribution layer on top of the second photo-sensitive material layer; and   forming a plurality of solder balls on top of the second redistribution layer.   
     
     
         11 . The method of  claim 8 , further comprising:
 face-to-face attaching the semiconductor die to the second wafer using a plurality of metal bumps; and   face-to-face attaching the plurality of multi-die structures to the first wafer using a plurality of metal bumps.   
     
     
         12 . The method of  claim 8 , further comprising:
 forming a first group of openings between one side of the semiconductor die and a front side of the first photo-sensitive material layer;   forming a second group of openings between one side of the second wafer and the front side of the first photo-sensitive material layer;   forming a third group of openings between one side of the first wafer and a front side of the second photo-sensitive material layer; and   forming a fourth group of openings between the front side of the second photo-sensitive material layer and the front side of the first photo-sensitive material layer.   
     
     
         13 . The method of  claim 12 , further comprising:
 electroplating conductive materials in the first group of openings;   electroplating conductive materials in the second group of openings;   electroplating conductive materials in the third group of openings; and   electroplating conductive materials in the fourth group of openings.   
     
     
         14 . The method of  claim 8 , further comprising:
 sawing the second reconfigured wafer into a plurality of packages, wherein each package comprises a plurality of semiconductor dies.   
     
     
         15 . A method comprising:
 attaching a first semiconductor die on a top side of a wafer;   forming a first reconfigured wafer by embedding the first semiconductor die into a first photo-sensitive material layer;   forming a first group of through assembly vias in the first photo-sensitive material layer;   attaching a second semiconductor die on the first photo-sensitive material layer;   forming a second photo-sensitive material layer on top of the first photo-sensitive material layer, wherein the second semiconductor die is embedded in the second photo-sensitive material layer; and   forming a second group of through assembly vias in the second photo-sensitive material layer.   
     
     
         16 . The method of  claim 15 , further comprising:
 attaching the wafer on a first base plane.   
     
     
         17 . The method of  claim 15 , further comprising:
 attaching the second semiconductor die to the first semiconductor die using a first adhesive layer;   back-to-face attaching the first semiconductor die to the wafer using a second adhesive layer;   forming a first redistribution layer on top of the first photo-sensitive material layer;   forming a second redistribution layer on top of the second photo-sensitive material layer; and   forming a plurality of solder balls on top of the second redistribution layer.   
     
     
         18 . The method of  claim 17 , further comprising:
 attaching a top side of the second semiconductor die to the first redistribution layer using a plurality of metal bumps; and   face-to-face attaching the first semiconductor die to the wafer using a plurality of metal bumps.   
     
     
         19 . The method of  claim 15 , further comprising interconnecting the first group through assembly vias and the second group through assembly vias. 
     
     
         20 . The method of  claim 15 , further comprising:
 forming a second reconfigured wafer by embedding the first reconfigured wafer and the second semiconductor die into the second photo-sensitive material layer; and   sawing the second reconfigured wafer into a plurality of packages, wherein each package comprises a plurality of semiconductor dies.