US2013020698A1PendingUtilityA1

Pillar Design for Conductive Bump

Assignee: TAIWAN SEMICONDUCTOR MFGPriority: Jul 22, 2011Filed: Jul 22, 2011Published: Jan 24, 2013
Est. expiryJul 22, 2031(~5 yrs left)· nominal 20-yr term from priority
H10W 90/26H10W 90/722H10W 72/07236H10W 72/072H10W 72/241H10W 72/07221H10W 72/07223H10W 90/724H10W 72/07253H10W 72/255H10W 72/252H10W 72/242H10W 72/234H10W 72/232H10W 72/01257H10W 72/01215H10W 72/01251H10W 72/01255H10W 72/01235H10W 72/01238H10W 72/01223H10W 72/20H10W 90/00H10W 90/20H10W 72/244H10W 72/012
49
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A system and method for conductive pillars is provided. An embodiment comprises a conductive pillar having trenches located around its outer edge. The trenches are used to channel conductive material such as solder when a conductive bump is formed onto the conductive pillar. The conductive pillar may then be electrically connected to another contact through the conductive material.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising:
 a first substrate; and   a conductive post extending away from the first substrate, the conductive post comprising one or more trenches perpendicular to the first substrate.   
     
     
         2 . The semiconductor device of  claim 1 , further comprising a conductive material located within the one or more trenches. 
     
     
         3 . The semiconductor device of  claim 2 , wherein the conductive material is solder. 
     
     
         4 . The semiconductor device of  claim 2 , further comprising:
 a second substrate located over the first substrate; and   a conductive region located on the second substrate, wherein the conductive region is in contact with the conductive material.   
     
     
         5 . The semiconductor device of  claim 2 , wherein the conductive material extends beyond a diameter of the conductive post. 
     
     
         6 . The semiconductor device of  claim 2 , wherein the conductive material fills only part of the one or more trenches. 
     
     
         7 . The semiconductor device of  claim 1 , wherein the conductive post comprises copper. 
     
     
         8 . The semiconductor device of  claim 1 , wherein the one or more trenches comprise at least two or more trenches arranged symmetrically around the conductive post. 
     
     
         9 . A semiconductor device comprising:
 a passivation layer located over a substrate;   a conductive post extending through the passivation layer, the conductive post having an outer circumference;   a plurality of grooves located around the outer circumference of the conductive post; and   a conductive material located over the conductive post.   
     
     
         10 . The semiconductor device of  claim 9 , wherein the conductive material is solder. 
     
     
         11 . The semiconductor device of  claim 9 , wherein the plurality of grooves comprises four grooves. 
     
     
         12 . The semiconductor device of  claim 9 , wherein the conductive material fills the plurality of grooves over the passivation layer. 
     
     
         13 . The semiconductor device of  claim 9 , wherein the conductive material only partially fills the plurality of grooves over the passivation layer. 
     
     
         14 . The semiconductor device of  claim 9 , further comprising:
 a second substrate; and   a contact on the second substrate, wherein the contact on the second substrate is in contact with the conductive material.   
     
     
         15 . A method of manufacturing a semiconductor device, the method comprising:
 forming a first conductive pillar with one or more trenches over a substrate, the one or more trenches being perpendicular to the substrate;   placing conductive material onto the first conductive pillar; and   reflowing the conductive material such that a portion of the conductive material is passively guided into the one or more trenches.   
     
     
         16 . The method of  claim 15 , further comprising:
 placing a second conductive pillar in contact with the conductive material; and   reflowing the conductive material to bond the second conductive pillar to the first conductive pillar, wherein the conductive material self-aligns the first conductive pillar to the second conductive pillar.   
     
     
         17 . The method of  claim 15 , wherein the reflowing the conductive material further forms an extension of the conductive material beyond a diameter of the first conductive pillar. 
     
     
         18 . The method of  claim 15 , wherein the forming the conductive pillar with one or more trenches further comprises forming two or more trenches symmetrically around the conductive pillar. 
     
     
         19 . The method of  claim 15 , wherein the conductive pillar comprises copper. 
     
     
         20 . The method of  claim 15 , further comprising forming a barrier layer over the first conductive pillar before placing the conductive material onto the first conductive pillar.

Join the waitlist — get patent alerts

Track US2013020698A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.