US2010320560A1PendingUtilityA1

Metallic Bump Structure Without Under Bump Metallurgy And a Manufacturing Method Thereof

Assignee: YU WAN-LINGPriority: Oct 6, 2008Filed: Aug 28, 2010Published: Dec 23, 2010
Est. expiryOct 6, 2028(~2.2 yrs left)· nominal 20-yr term from priority
Inventors:Wan-Ling Yu
H10W 72/9415H10W 72/922H10W 72/952H10W 72/923H10W 72/29H10W 72/01953H10W 72/01935H10W 72/01936H10W 70/60H10W 70/05H10W 72/255H10W 72/223H10W 72/245H10W 72/252H10W 72/222H10W 72/242H10W 72/01255H10W 72/221H10W 72/01215H10W 72/01235H10W 72/01204H10W 74/47
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Claims

Abstract

The metallic bump is directly formed on a semiconductor wafer's I/O pad without UBM. First, a zinc layer is formed on the I/O pad or an anti-oxidation layer of the I/O pad is selectively etched off. Then, an isolative layer and a copper foil are arranged sequentially in this order above the I/O pad. The isolative layer is originally in a liquid state or in a temporarily solid state and later permanently solidified. Then, a via above the I/O pad is formed by removing part of the isolative layer and the cooper foil. Subsequently, A thin metallic layer connecting the copper foil and the I/O pad is formed in the via and a plating resist on the copper foil is formed. Then, a metallic bump is formed from the via whose height is controlled by the plating resist. Finally, the plating resist and the copper foil are removed.

Claims

exact text as granted — not AI-modified
1 . A metallic bump structure on an I/O pad on an active side of a semiconductor die, comprising:
 an isolative layer and a copper foil in this order on said active side of said semiconductor die, said isolative layer and said copper foil having a via above said I/O pad;   a thin metallic layer at least in said via, said thin metallic layer connected to said copper foil and said I/O pad; and   a metallic material filled in said via and extended vertically above said copper foil and said isolative layer for an appropriate thickness.   
     
     
         2 . The metallic bump structure according to  claim 1 , further comprising:
 if said I/O pad is made of aluminum or said I/O pad has an anti-oxidation layer made of aluminum, a zinc layer on a top surface of said aluminum I/O pad or said aluminum anti-oxidation layer.   
     
     
         3 . The metallic bump structure according to  claim 1 , wherein said isolative layer is in one of a temporarily cured state and a liquid state before being applied to said active side. 
     
     
         4 . The metallic bump structure according to  claim 1 , wherein said thin metallic layer is made of one of copper and nickel. 
     
     
         5 . The metallic bump structure according to  claim 1 , wherein said metallic material is one of gold, copper, tin, nickel, solder, and a combination thereof. 
     
     
         6 . The metallic bump structure according to  claim 1 , further comprising:
 a coating layer for anti-oxidation at least on a top surface of said metallic material.   
     
     
         7 . The metallic bump structure according to  claim 1 , wherein said metallic material laterally extends above said copper foil and said isolative layer from said via to one of a rerouted location and an intermediate location of a metallic bump. 
     
     
         8 . The metallic bump structure according to  claim 7 , wherein said copper foil and said isolative layer has a blind hole at said rerouted location covered with said thin metallic layer. 
     
     
         9 . The metallic bump structure according to  claim 7 , wherein said copper foil and said isolative layer has a blind hole at said rerouted location filled with a conductive paste. 
     
     
         10 . The metallic bump structure according to  claim 7 , further comprising:
 a second metallic material on a top surface of said metallic material at said rerouted location for an appropriate thickness.   
     
     
         11 . The metallic bump structure according to  claim 10 , wherein said second metallic material is one of gold, copper, tin, nickel, solder, and a combination thereof. 
     
     
         12 . The metallic bump structure according to  claim 7 , further comprising:
 a second isolative layer and a second copper foil in this order on said active side of said semiconductor die, said second isolative layer and said second copper foil having a second via at said intermediate location;   a second thin metallic layer at least in said second via;   a second metallic material above said second copper foil and said second isolative layer laterally extends from said second via to said rerouted location of said metallic bump; and   a third metallic material on a top surface of said second metallic material at said rerouted location for an appropriate thickness.   
     
     
         13 . The metallic bump structure according to  claim 12 , wherein said second isolative layer and said second copper foil have a blind hole at said rerouted location covered with said second thin metallic layer and filled with said second metallic material. 
     
     
         14 . The metallic bump structure according to  claim 12 , wherein said second isolative layer and said second copper foil have a blind hole at said rerouted location filled with a conductive paste. 
     
     
         15 . The metallic bump structure according to  claim 12 , wherein said second and third metallic materials are one of gold, copper, tin, nickel, solder, and a combination thereof. 
     
     
         16 . A metallic bump structure on an I/O pad on an active side of a semiconductor die, comprising:
 an isolative layer on said active side of said semiconductor die, said isolative layer having a via above said I/O pad;   a thin metallic layer on a top surface of said isolative layer and in said via connecting said I/O pad; and   a metallic material filled in said via and extended vertically above said thin metallic layer and said isolative layer for an appropriate thickness.   
     
     
         17 . The metallic bump structure according to  claim 16 , further comprising:
 if said I/O pad is made of aluminum or said I/O pad has an anti-oxidation layer made of aluminum, a zinc layer on a top surface of said aluminum I/O pad or said aluminum anti-oxidation layer.   
     
     
         18 . The metallic bump structure according to  claim 16 , wherein said isolative layer is in one of a temporarily cured state and a liquid state before being applied to said active side. 
     
     
         19 . The metallic bump structure according to  claim 16 , wherein said thin metallic layer is made of one of copper and nickel. 
     
     
         20 . The metallic bump structure according to  claim 16 , wherein said metallic material is one of gold, copper, tin, nickel, solder, and a combination thereof. 
     
     
         21 . The metallic bump structure according to  claim 16 , further comprising:
 a coating layer for anti-oxidation at least on a top surface of said metallic material.   
     
     
         22 . The metallic bump structure according to  claim 16 , wherein said metallic material laterally extends above said thin metallic layer and said isolative layer from said via to one of a rerouted location and an intermediate location of a metallic bump. 
     
     
         23 . The metallic bump structure according to  claim 22 , wherein said isolative layer has a blind hole at said rerouted location covered with said thin metallic layer. 
     
     
         24 . The metallic bump structure according to  claim 22 , wherein said isolative layer has a blind hole at said rerouted location filled with a conductive paste. 
     
     
         25 . The metallic bump structure according to  claim 22 , further comprising:
 a second metallic material on a top surface of said metallic material at said rerouted location for an appropriate thickness.   
     
     
         26 . The metallic bump structure according to  claim 25 , wherein said second metallic material is one of gold, copper, tin, nickel, solder, and a combination thereof. 
     
     
         27 . The metallic bump structure according to  claim 22 , further comprising:
 a second isolative layer and a second copper foil in this order on said active side of said semiconductor die, said second isolative layer and said second copper foil having a second via at said intermediate location;   a second thin metallic layer at least in said second via;   a second metallic material above said second copper foil and said second isolative layer laterally extends from said second via to said rerouted location of said metallic bump; and   a third metallic material on a top surface of said second metallic material at said rerouted location for an appropriate thickness.   
     
     
         28 . The metallic bump structure according to  claim 27 , wherein said second isolative layer has a blind hole at said rerouted location covered with said second thin metallic layer and filled with said second metallic material. 
     
     
         29 . The metallic bump structure according to  claim 27 , wherein said second isolative layer has a blind hole at said rerouted location filled with a conductive paste. 
     
     
         30 . The metallic bump structure according to  claim 27 , wherein said second and third metallic materials are one of gold, copper, tin, nickel, solder, and a combination thereof.

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