Multi-fin field effect transistor

Abstract

A multi-fin field effect transistor includes a substrate, an oxide layer, a conductive layer, a gate oxide layer, and a doped region. The substrate is surrounded by a trench, and there are at least two fin-type silicon layers formed in the substrate in a region prepared to form a gate thereon. The oxide layer is disposed in the trench and the top surface of the oxide layer is lower than that of the fin-type silicon layers. The conductive layer is disposed in the region prepared to form a gate. The top surface of the conductive layer is higher than that of the fin-type silicon layers. The gate oxide layer is disposed between the conductive layer and the fin-type silicon layers and disposed between the conductive layer and the substrate. The doped region is disposed in the substrate on both sides of the conductive layer.

1 . A multi-fin field effect transistor, comprising:
 a substrate, surrounded by a trench, wherein at least two fin-type silicon layers are disposed in a region of the substrate predetermined to form a gate thereon;   an oxide layer, disposed in the trench and the top surface of the oxide layer being lower than that of the fin-type silicon layers;   a conductive layer, disposed in the region of the substrate and the top surface of the conductive layer is higher than that of the fin-type silicon layers;   a gate oxide layer, disposed between the conductive layer and the fin-type silicon layers and between the conductive layer and the substrate; and   a doped region, disposed in the substrate at both sides of the conductive layer.   
   
   
       2 . The multi-fin field effect transistor as claimed in  claim 1 , further comprising a metal silicide layer disposed on the surfaces of the conductive layer and the doped region. 
   
   
       3 . The multi-fin field effect transistor as claimed in  claim 2 , wherein the material of the metal silicide layer comprises cobalt silicide, titanium silicide, tungsten silicide, tantalum silicide, molybdenum silicide, and nickel silicide. 
   
   
       4 . The multi-fin field effect transistor as claimed in  claim 1 , further comprising a lining oxide layer disposed on the surface of the substrate on the sidewall of the trench, and a lining nitride layer disposed between the oxide layer and the lining oxide layer. 
   
   
       5 . The multi-fin field effect transistor as claimed in  claim 1 , wherein the doped region comprises a lightly doped region and a heavily doped region. 
   
   
       6 . The multi-fin field effect transistor as claimed in  claim 1 , further comprising a spacer disposed on the substrate at both sides of the conductive layer and covering a portion of the doped region, wherein the material of the spacer comprises silicon oxide or silicon nitride. 
   
   
       7 . The multi-fin field effect transistor as claimed in  claim 1 , wherein the material of the conductive layer comprises poly-silicon or doped poly-silicon.