Method for fabricating reliable semiconductor structure

Abstract

A reliable semiconductor structure and its fabrication method. Active regions and/or scribe lines on a semiconductor substrate are configured along a crack resistant crystalline direction. Thermal cracking due to the abrupt temperature ramp of rapid thermal processing can be avoided.

1 . A method of fabricating a semiconductor structure, comprising: 
 providing a single crystalline semiconductor substrate;    defining active regions on the semiconductor substrate along a crystalline direction where the semiconductor substrate is resistant to thermal cracking; and    forming devices on the active regions, which comprises a step of subjecting the semiconductor substrate to rapid thermal processing.    
   
   
       2 . The method of  claim 1 , wherein the active region is extended along a direction at a slant to a <110> direction of the semiconductor substrate.  
   
   
       3 . The method of  claim 1 , wherein the active region is extended along a direction which lies at an angle of about 25-40 degrees to a <110> crystalline direction of the semiconductor substrate.  
   
   
       4 . The method of  claim 1 , wherein the active region is substantially extended along a <100> crystalline direction of the semiconductor substrate.  
   
   
       5 . The method of  claim 4 , wherein the device comprises a field effect transistor with a gate electrode and source/drain regions, wherein a channel length of the field effect transistor is less than 90 nm, and the source/drain regions have a junction depth less than 43 nm.  
   
   
       6 . The method of  claim 5 , wherein the semiconductor substrate is thermally treated by tungsten-halogen lamp.  
   
   
       7 . The method of  claim 5 , wherein the semiconductor substrate is thermally treated by noble gas long-arc lamp with a temperature ramp rate exceeding 10,000° C./sec.  
   
   
       8 . The method of  claim 5 , wherein the semiconductor substrate is thermally treated by a laser source.  
   
   
       9 . The method of  claim 1 , wherein the semiconductor substrate has a ( 100 ) surface orientation.  
   
   
       10 . The method of  claim 5 , wherein a channel direction of the field effect transistor is substantially not parallel with the crystalline direction the active region extends.  
   
   
       11 . A method of fabricating a semiconductor structure, comprising: 
 providing a single crystalline semiconductor substrate;    forming devices on the semiconductor substrate within a plurality of die areas divided by scribe lines extending along a crystalline direction where the semiconductor substrate is resistant to thermal cracking, wherein the forming of the devices comprises a step of subjecting the substrate to rapid thermal processing.    
   
   
       12 . The method of  claim 11 , wherein the scribe lines are extended along a direction at a slant to a <110> crystalline direction of the semiconductor substrate.  
   
   
       13 . The method of  claim 11 , wherein the scribe lines are extended along a direction which lies at an angle of about 25-40 degrees to a <110> crystalline direction of the semiconductor substrate.  
   
   
       14 . The method of  claim 11 , wherein the scribe lines are extended along a <100> crystalline direction of the semiconductor substrate.  
   
   
       15 . The method of  claim 11 , further comprising an active region extending along a direction substantially unparallel with the scribe lines.  
   
   
       16 . The method of  claim 15 , wherein the scribe lines are extended along a <100> crystalline direction of the semiconductor substrate, and the active region is extended along a <110> crystalline direction.  
   
   
       17 . The method of  claim 11 , wherein the semiconductor substrate has a ( 100 ) surface orientation.  
   
   
       18 . The method of  claim 11 , wherein the semiconductor substrate is thermally treated by tungsten-halogen lamp.  
   
   
       19 . The method of  claim 11 , wherein the semiconductor substrate is thermally treated by noble gas long-arc lamp with a temperature ramp rate exceeding 10,000° C./sec.  
   
   
       20 . The method of  claim 11 , wherein the semiconductor substrate is thermally treated by a laser source.