Structure and method of making capped chips having vertical interconnects

Abstract

Capped chips and methods of forming a capped chip are provided in which electrical interconnects are made by conductive elements which extend from bond pads of a chip at least partially through a plurality of through holes of a cap. The electrical interconnects may be solid, so as to form seals extending across the through holes. In some cases, stud bumps extend from the bond pads, forming parts of the electrical interconnects. In some cases, a fusible conductive medium forms a part of the electrical interconnects.

1 . A capped chip, comprising: 
 a chip having an upwardly facing front surface and a plurality of bond pads exposed in a bond pad region at said front surface;    a cap member having a bottom surface confronting said front surface of said chip, a top surface opposite said bottom surface, and a plurality of through holes extending between said top and bottom surfaces, said cap member being mounted to said chip with at least a portion of said bottom surface spaced from said front surface to define a void; and    a plurality of solid electrically conductive interconnects extending at least partially through said through holes to form seals extending across said through holes.    
     
     
         2 . A capped chip as claimed in  claim 1 , further comprising a seal disposed between said bottom surface of said cap member and a portion of said front surface of said chip, said seal at least substantially enclosing said void.  
     
     
         3 . A capped chip as claimed in  claim 2 , wherein said chip includes an active area and said through holes are disposed between said seal and said active area such that said seal and said interconnects seal said active area within said void.  
     
     
         4 . A capped chip as claimed in  claim 2 , wherein said interconnects include a fusible material and an attach temperature of a sealing material of said seal coincides with a reflowing temperature for said fusible material.  
     
     
         5 . A capped chip as claimed in  claim 2 , wherein said bottom surface of said cap member includes a stop, said stop being engaged with said front surface of said active chip to control a spacing between said cap member and said chip.  
     
     
         6 . A capped chip as claimed in  claim 5 , wherein a sealing material of said seal is disposed in contact with said stop and with said front surface of said chip such that said cap member is sealed to said chip at said stop.  
     
     
         7 . A capped chip as claimed in  claim 5 , wherein said stop includes a knife-edge.  
     
     
         8 . A capped chip as claimed in  claim 2 , wherein said seal includes a polymer.  
     
     
         9 . A capped chip as claimed in  claim 2 , wherein said polymer includes at least one of a thermoplastic, a self-fluxing underfill and an adhesive.  
     
     
         10 . A capped chip as claimed in  claim 2 , wherein said seal includes a low melting point glass.  
     
     
         11 . A capped chip as claimed in  claim 2 , wherein said seal includes solder.  
     
     
         12 . A capped chip as claimed in  claim 2 , wherein said seal includes a eutectic composition.  
     
     
         13 . A capped chip as claimed in  claim 2 , wherein said seal is diffusion bonded to at least one of said chip and said cap member.  
     
     
         14 . A capped chip as claimed in  claim 2 , wherein said seal includes spacing elements, such that said front surface of said chip and said bottom surface of said cap member are spaced by no less than a width of said spacing elements.  
     
     
         15 . A capped chip as claimed in  claim 2 , wherein said chip includes a rear surface opposite said front surface and peripheral edges extending between said front and rear surfaces, and said cap member includes peripheral edges disposed between said bottom surface and said top surface, wherein said chip further comprises an additional seal sealing at least said peripheral edges of said cap member to said peripheral edges of said chip.  
     
     
         16 . A capped chip as claimed in  claim 1 , wherein said cap member includes at least one material selected from the group consisting of ceramics, metals, glasses, and semiconductor materials.  
     
     
         17 . A capped chip as claimed in  claim 16 , wherein said cap member consists essentially of a material having a coefficient of thermal expansion (CTE) closely matched to a CTE of said chip.  
     
     
         18 . A capped chip as claimed in  claim 17 , wherein said chip includes a surface acoustic wave (SAW) device exposed at said front surface and said cap member includes a material having a CTE which is closely matched to a CTE of said SAW device.  
     
     
         19 . A capped chip as claimed in  claim 18 , wherein said SAW device includes a component consisting essentially of lithium tantalate, and said cap member includes a layer of aluminum and a layer of an oxide overlying said layer of aluminum.  
     
     
         20 . A capped chip as claimed in  claim 17 , wherein said cap member includes a metal layer and an oxide layer overlying said metal layer, said oxide layer including an oxide of a metal of said metal layer, wherein said oxide layer lines said through holes.  
     
     
         21 . A capped chip as claimed in  claim 17 , wherein said material of said cap member includes at least one material selected from the group consisting of nickel alloys.  
     
     
         22 . A capped chip as claimed in  claim 16 , wherein said through holes are metallized with two or more layers of metal disposed on sidewalls thereof.  
     
     
         23 . A capped chip as claimed in  claim 22 , wherein said layers of metal include a layer consisting essentially of titanium contacting said sidewall of said through hole, a layer consisting essentially of platinum contacting said titanium layer, and an exposed layer consisting essentially of gold contacting said platinum layer.