Method and apparatus for planarizing gap-filling material

Abstract

A method an apparatus for fabricating an interconnection structure. A substrate is provided with a dielectric layer thereon. The dielectric layer comprises at least one opening therein. A gap-filling material is applied on the substrate filling the at least one opening. The gap-filling material is planarized using a template to create a substantially planarized surface.

1 . An apparatus for planarizing a gap-filling material on a substrate, comprising: 
 a support for the substrate;    a template positioned opposite the support, the template having a substantially planar surface; and    a controller controlling relative movements of the template which exert a force on the substrate.    
   
   
       2 . The apparatus according to  claim 1 , wherein the material of the template comprises Ni, or Si.  
   
   
       3 . The apparatus according to  claim 1 , wherein the material of the template comprises a material has a contact angle greater than  70  degree to the gap-filling material.  
   
   
       4 . The apparatus according to  claim 1 , further comprising a heater for heating the substrate.  
   
   
       5 . The apparatus according to  claim 1 , wherein the controller controls rotational movement of the template.  
   
   
       6 . An apparatus for forming an interconnection structure on a substrate, comprising: 
 a coater to apply a gap-filling material on the substrate;    an edge-bevel-removal to remove the gap-filling material at the edge of the substrate; and    a spin-dry-rinse cleaner to clean the surface of planarized gap-filling material and back of the substrate;    a support for the substrate;    a template positioned opposite the support, the template having a substantially planar surface; and    a controller controlling relative movements of the template which exert a force on the substrate.    
   
   
       7 . The apparatus according to  claim 6 , further comprising a heater for heating the substrate.  
   
   
       8 . A method for fabricating an integrated circuit device, comprising: 
 providing a substrate with a dielectric layer thereon, the dielectric layer having an opening therein;    disposing a gap-filling material on the substrate filling the opening; and    pressing a template against the gap-filling material to create a substantially planarized surface.    
   
   
       9 . The method according to  claim 8 , wherein the integrated circuit device comprises a dual-damascene interconnection.  
   
   
       10 . The method according to  claim 8 , wherein the gap-filling material comprises an organic spin-on polymer or spin-on Si containing materials.  
   
   
       11 . The method according to  claim 8 , wherein the template material comprises Ni or Si.  
   
   
       12 . The method according to  claim 8 , wherein the template material comprises a material has a contact angle greater than 70 degree to the gap-filling material.  
   
   
       13 . The method according to  claim 8 , wherein the template a low coefficient of adhesion to the gap-filling material.  
   
   
       14 . The method according to  claim 8 , further comprising baking the gap-filling material at a temperature equal to or exceeding glass transition temperature T g  for gap-filling materials selected from the group spin on organic and spin on Si containing materials.  
   
   
       15 . The method according to  claim 8 , further comprising applying a force on the substrate.  
   
   
       16 . The method according to  claim 15 , wherein the force accompanies a rotating force.  
   
   
       17 . The method according to  claim 8 , further comprising performing edge bevel removal (EBR) and spin-rinse-dry (SRD) on the substrate.  
   
   
       18 . The method according to  claim 8 , further comprising: 
 forming a patterned photoresist on the planarized gap-filling material with a trench pattern therein;    etching the dielectric layer to form a trench corresponding the opening using the patterned photoresist as a mask;    forming conductive layer filling in the trench and the opening.