In-tray burn-in board, device and test assembly for testing integrated circuit devices in situ on processing trays
Abstract
A burn-in board for burn-in and electrical testing of a plurality of integrated circuit devices that are disposed in one or more processing trays may include a substrate having an interface surface and a plurality of electrical contacts disposed on the interface surface for establishing, through engagement with the one or more processing trays, electrical communication between the leads of the integrated circuit devices and a tester. One or more ports may be defined in the substrate so as to extend between the interface surface and another surface of the substrate wherein the port or ports are sized and configured to enable application of a negative pressure between the substrate and the one or more processing trays upon engagement of the substrate therewith and upon application of a vacuum through the one or more ports.
Claims
exact text as granted — not AI-modified1 . A system for testing integrated circuit devices disposed in processing trays, comprising:
a burn-in board having a plurality of electrical contacts located and configured for establishing direct electrical contact with a plurality of said integrated circuit devices disposed in at least one of said processing trays; a tray source configured to deliver processing trays adjacent said burn-in board; a displacement mechanism configured to move said burn-in board and said at least one processing tray into mutual engagement; and a tester in electrical communication with said plurality of electrical contacts.
2 . The system of claim 1 , further comprising an apparatus for sorting said plurality of integrated circuit devices responsive to testing thereof.
3 . The system of claim 1 , further comprising a system controller configured for controlling the operation of said tray source, said displacement mechanism, and said tester.
4 . The system of claim 1 , further comprising an environmental chamber sized and configured to receive said burn-in board and said at least one processing tray in engagement therewith during testing.
5 . A system for testing integrated circuit devices disposed in processing trays, comprising:
a burn-in board having an interface surface; a tray source configured to deliver at least two of said processing trays adjacent said burn-in board; a plurality of electrical contacts disposed on said interface surface located and configured for establishing direct electrical contact with integrated circuit devices disposed in one of said at least two processing trays; at least one other plurality of electrical contacts disposed on said interface surface located and configured for establishing direct electrical contact with integrated circuit devices disposed in another of said at least two processing trays; a displacement mechanism configured to move said burn-in board and said at least two of said processing trays into mutual engagement; and a tester electrically coupled to said plurality of electrical contacts and to said at least one other plurality of electrical contacts.
6 . The system of claim 5 , further comprising an apparatus for sorting said integrated circuit devices responsive to testing thereof.
7 . The system of claim 5 , further comprising a system controller configured for controlling the operation of said tray source, said displacement mechanism, and said tester.
8 . The system of claim 5 , further comprising an environmental chamber sized and configured to receive said burn-in board and said at least two of said processing trays in engagement therewith during testing.
9 . A test system for burn-in and electrical testing of integrated circuit devices disposed in processing trays, comprising:
a burn-in board including an interface surface and an electrical conduit; a tray source configured to deliver at least one processing tray adjacent said burn-in board; at least one plurality of electrical contacts disposed on said interface surface located and configured to establish direct electrical contact with integrated circuit devices disposed in said at least one processing tray, said at least one plurality of electrical contacts electrically coupled to said electrical conduit; a displacement mechanism configured to move said burn-in board and said at least one processing tray into mutual engagement; a tester in electrical communication with said electrical conduit; and a system controller operably coupled to said tray source, said displacement mechanism, and said tester, and configured to control operation thereof.
10 . The test system of claim 9 , further comprising:
an environmental chamber sized and configured to receive said burn-in board and said at least one processing tray in engagement therewith during testing; wherein said system controller is operably coupled to said environmental chamber and configured to control operation thereof.
11 . The test system of claim 9 , further comprising:
a sorting apparatus configured for sorting said integrated circuit devices responsive to testing thereof; wherein said system controller is operably coupled to said sorting apparatus and configured to control operation thereof.
12 . The test system of claim 9 , further comprising:
at least one latching mechanism associated with said burn-in board and configured to attach said at least one processing tray to said burn-in board; wherein said system controller is operably coupled to said at least one latching mechanism and is configured to control operation thereof.
13 . A method of testing integrated circuit devices, comprising:
disposing said integrated circuit devices in a plurality of processing trays; delivering at least one processing tray of said plurality of processing trays adjacent a burn-in board; moving said burn-in board and said at least one processing tray into mutual engagement; establishing electrical contact between said burn-in board and integrated circuit devices disposed in said at least one processing tray; and measuring at least one electrical characteristic of said integrated circuit devices disposed in said at least one processing tray.
14 . The method of claim 13 , further comprising:
moving said burn-in board and said at least one processing tray away from one another to terminate said electrical contact between said burn-in board and said integrated circuit devices; and delivering at least one other processing tray of said plurality of processing trays adjacent said burn-in board.
15 . The method of claim 13 , further comprising subjecting said integrated circuit devices disposed in said at least one processing tray to thermal cycling while measuring said at least one electrical characteristic.
16 . The method of claim 13 , further comprising sorting said integrated circuit devices disposed in said at least one processing tray according to said at least one electrical characteristic exhibited by each of said integrated circuit devices.
17 . A method of performing burn-in and electrical testing of integrated circuit devices disposed in processing trays, comprising:
delivering at least one of said processing trays into a target zone proximate a burn-in board, said at least one processing tray having a plurality of said integrated circuit devices disposed thereon; moving said burn-in board and said at least one processing tray into mutual engagement; establishing electrical contact between said burn-in board and said plurality of said integrated circuit devices; and measuring at least one electrical characteristic of said plurality of said integrated circuit devices.
18 . The method of claim 17 , further comprising:
moving said burn-in board and said at least one processing tray away from one another to terminate said electrical contact; moving said at least one processing tray out of said target zone; and delivering at least one other of said processing trays having a plurality of said integrated circuit devices disposed thereon into said target zone.
19 . The method of claim 17 , further comprising subjecting said plurality of said integrated circuit devices disposed in said at least one processing tray to thermal cycling while measuring said at least one electrical characteristic.
20 . The method of claim 17 , further comprising:
sorting said plurality of said integrated circuit devices disposed in said at least one processing tray into categories according to said at least one electrical characteristic exhibited by each integrated circuit device of said plurality of said integrated circuit devices; and transferring said plurality of said integrated circuit devices to other transport media according to said categories.
21 . The method of claim 17 , further comprising:
providing a system controller; and controlling said acts of delivering at least one of said processing trays into a target zone proximate a burn-in board, moving said burn-in board and said at least one processing tray into mutual engagement, and measuring at least one electrical characteristic of said plurality of said integrated circuit devices, with said system controller.
22 . The method of claim 19 , further comprising:
providing a system controller; controlling said acts of delivering at least one of said processing trays into a target zone proximate a burn-in board; moving said burn-in board and said at least one processing tray into mutual engagement; measuring at least one electrical characteristic of said plurality of said integrated circuit devices; and subjecting said plurality of said integrated circuit devices disposed in said at least one processing tray to thermal cycling, with said system controller.
23 . The method of claim 20 , further comprising:
providing a system controller; controlling said acts of delivering at least one of said processing trays into a target zone proximate a burn-in board; moving said burn-in board and said at least one processing tray into mutual engagement; measuring at least one electrical characteristic of said plurality of said integrated circuit devices; sorting said plurality of said integrated circuit devices; and transferring said plurality of said integrated circuit devices, with said system controller.
24 . A system for testing integrated circuit devices disposed in processing trays, comprising:
at least two test assemblies, each test assembly of said at least two test assemblies including a burn-in board in mutual engagement with at least one of said processing trays, said burn-in board including a plurality of electrical contacts located and configured for establishing direct electrical contact with a plurality of said integrated circuit devices disposed in said at least one processing tray; a test frame including at least two test bays, each test bay of said at least two test bays configured to receive and support one of said at least two test assemblies and to establish electrical contact therewith; and a tester in electrical communication with said at least two test assemblies.
25 . The test system of claim 24 , further comprising at least one latching mechanism disposed in said each test assembly and configured to secure said burn-in board and said at least one processing tray in said mutual engagement.
26 . The test system of claim 24 , further comprising:
an assembly apparatus configured to effect said mutual engagement between said burn-in board and said at least one processing tray to form said each test assembly, and further configured to move said each test assembly to one of said at least two test bays on said test frame; a tray source configured to deliver said processing trays to said assembly apparatus; and a burn-in board source configured to deliver said burn-in boards to said assembly apparatus.
27 . The test system of claim 26 , further comprising a system controller operably coupled to said tester, said assembly apparatus, said tray source, and said burn-in board source, and configured to control operation thereof.
28 . The test system of claim 24 , further comprising an environmental chamber sized and configured to receive said test frame.
29 . A system for testing integrated circuit devices disposed in processing trays, comprising:
a plurality of burn-in boards, each burn-in board of said plurality of burn-in boards including an interface surface and a plurality of electrical contacts disposed on said interface surface, said plurality of electrical contacts located and configured for establishing direct electrical contact with integrated circuit devices disposed in at least one of said processing trays, said each burn-in board further including an electrical conduit electrically connected to said plurality of electrical contacts; an assembly apparatus configured to secure one of said plurality of burn-in boards and at least one of said processing trays in mutual engagement to form a test assembly; a test frame configured to receive a plurality of said test assemblies, said test frame including at least one shelf configured to support at least one of said test assemblies and further including at least one connector configured for electrical connection to at least one of said electrical conduits; and a tester electrically coupled to said at least one connector on said test frame.
30 . The test system of claim 29 , further comprising:
at least one other plurality of electrical contacts disposed on said interface surface of said each burn-in board, said at least one other plurality of electrical contacts located and configured for establishing direct electrical contact with integrated circuit devices disposed in at least one other of said processing trays, said electrical conduit on said each burn-in board electrically connected to said at least one other plurality of electrical contacts; wherein said assembly apparatus is configured to secure said each burn-in board, said at least one processing tray, and said at least one other processing tray in mutual engagement to form one of said test assemblies.
31 . The test system of claim 29 , further comprising:
a tray source configured to deliver said processing trays to said assembly apparatus; a burn-in board source configured to deliver said plurality of burn-in boards to said assembly apparatus; and an environmental chamber sized and configured to receive said test frame and said plurality of said test assemblies received in said test frame.
32 . The test system of claim 31 , further comprising a system controller operably coupled to said assembly apparatus, said tester, said tray source, said burn-in board source, and said environmental chamber, and configured to control operation thereof.
33 . A test assembly for testing integrated circuit devices disposed in processing trays, comprising:
a burn-in board having an interface surface; a plurality of electrical contacts disposed on said interface surface located and configured for establishing direct electrical contact with a plurality of integrated circuit devices disposed in at least one of said processing trays; at least one latching mechanism securing said at least one processing tray and said burn-in board in mutual engagement, thereby establishing direct electrical contact between said plurality of electrical contacts and said plurality of integrated circuit devices; and an electrical conduit electrically connected to said plurality of electrical contacts and configured for electrically coupling said plurality of electrical contacts to a test frame.
34 . The test assembly of claim 33 , further comprising at least one alignment surface disposed on said burn-in board configured, by contact with said at least one processing tray, to align said at least one processing tray with respect to said burn-in board.
35 . A test assembly for testing a plurality of integrated circuit devices disposed in a plurality of cells arranged in a pattern on a processing tray, comprising:
a burn-in board including an interface surface and further including a plurality of footprints disposed on said interface surface arranged substantially congruent with said pattern, each footprint of said plurality of footprints comprising a plurality of electrical contacts located and configured for establishing direct electrical contact with a plurality of leads extending from one integrated circuit device of said plurality of integrated circuit devices; at least one latching mechanism securing said burn-in board and said processing tray in mutual engagement, thereby aligning each integrated circuit device of said plurality of integrated circuit devices disposed in said processing tray with one footprint of said plurality of footprints; and an electrical conduit electrically connected to said plurality of footprints and configured for electrically coupling said each footprint to a test frame.
36 . A method of testing integrated circuit devices disposed in processing trays, comprising:
securing each of said processing trays in mutual engagement with a burn-in board to form a plurality of test assemblies; establishing electrical contact between said burn-in board and a plurality of integrated circuit devices disposed in said each processing tray; disposing each test assembly of said plurality of test assemblies in an individual test bay of a test frame and supporting said each test assembly therein; electrically coupling said each test assembly to a test instrument; and measuring at least one electrical characteristic of said integrated circuit devices.
37 . The method of claim 36 , further comprising subjecting said integrated circuit devices disposed in said plurality of test assemblies to thermal cycling while measuring said at least one electrical characteristic.
38 . The method of claim 36 , further comprising aligning said each processing tray of said plurality of processing trays with respect to said burn-in board.
39 . The method of claim 36 , further comprising:
providing a system controller; controlling said acts of securing said each processing tray in mutual engagement with a burn-in board; disposing said each test assembly in an individual test bay of said test frame; and measuring at least one electrical characteristic of said integrated circuit devices, with said system controller.
40 . The method of claim 37 , further comprising:
providing a system controller; controlling said acts of securing said each processing tray in mutual engagement with a burn-in board, disposing said each test assembly in an individual test bay of said test frame; subjecting said integrated circuit devices disposed in said plurality of test assemblies to thermal cycling; and measuring at least one electrical characteristic of said integrated circuit devices, with said system controller.Join the waitlist — get patent alerts
Track US2006208755A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.