Microelectronic capacitor structure and method for fabrication thereof

Abstract

Within a method for fabricating a capacitor structure within a microelectronic fabrication there is formed a capacitor structure comprising a pair of capacitor plate layers separated by a capacitor dielectric layer. Within the method, at least one of the pair of capacitor plates is formed of a doped amorphous silicon material formed incident to isotropic etching within an etchant solution comprising aqueous ammonium hydroxide, without hydrogen peroxide.

1 . A method for fabricating a capacitor structure comprising: 
 providing a substrate;    forming over the substrate a first capacitor plate layer;    forming upon the first capacitor plate layer a capacitor dielectric layer; and    forming upon the capacitor dielectric layer a second capacitor plate layer, wherein: 
 at least one of the first capacitor plate layer and the second capacitor plate layer is formed of a doped amorphous silicon material.  
   
   
   
       2 . The method of  claim 1  wherein the at least one of the first capacitor plate layer and the second capacitor plate layer which is formed of the doped amorphous silicon material is formed incident to isotropic etching within an etchant solution comprising aqueous ammonium hydroxide, without hydrogen peroxide.  
   
   
       3 . The method of  claim 1  wherein the capacitor structure is employed within a microelectronic fabrication selected from the group consisting of integrated circuit microelectronic fabrications, ceramic substrate microelectronic fabrications, solar cell optoelectronic microelectronic fabrications, sensor image array optoelectronic microelectronic fabrications and display image array optoelectronic microelectronic fabrications.  
   
   
       4 . The method of  claim 2  wherein the at least one of the first capacitor plate layer and the second capacitor plate layer is masked when it is formed incident to isotropic etching within the etchant solution comprising aqueous ammonium hydroxide, without hydrogen peroxide.  
   
   
       5 . The method of  claim 2  wherein the at least one of the first capacitor plate layer and the second capacitor plate layer is unmasked when it is formed incident to isotropic etching within the etchant solution comprising aqueous ammonium hydroxide, without hydrogen peroxide.  
   
   
       6 . The method of  claim 1  wherein the etchant solution consists essentially of aqueous ammonium hydroxide.  
   
   
       7 . A method for fabricating a dynamic random access memory cell structure comprising: 
 providing a semiconductor substrate having formed therein a field effect transistor device;    forming over the semiconductor substrate and electrically connected with a first source/drain region within the field effect transistor device a capacitor structure comprising: 
 a first capacitor plate layer;  
 a capacitor dielectric layer formed upon the first capacitor plate layer; and  
 a second capacitor plate layer formed upon the capacitor dielectric layer, wherein: 
 at least one of the first capacitor plate layer and the second capacitor plate layer is formed of a doped amorphous silicon material.  
 
   
   
   
       8 . The method of  claim 7  wherein the at least one of the first capacitor plate layer and the second capacitor plate layer which is formed of the doped amorphous silicon material is formed incident to isotropic etching within an etchant solution comprising aqueous ammonium hydroxide, without hydrogen peroxide.  
   
   
       9 . The method of  claim 8  wherein the at least one of the first capacitor plate layer and the second capacitor plate layer is masked when it is formed incident to isotropic etching within the etchant solution comprising aqueous ammonium hydroxide, without hydrogen peroxide.  
   
   
       10 . The method of  claim 8  wherein the at least one of the first capacitor plate layer and the second capacitor plate layer is unmasked when it is formed incident to isotropic etching within the etchant solution comprising aqueous ammonium hydroxide, without hydrogen peroxide.  
   
   
       11 . The method of  claim 7  wherein the etchant solution consists essentially of aqueous ammonium hydroxide.  
   
   
       12 . A capacitor structure comprising: 
 a substrate;    a first capacitor plate layer formed over the substrate;    a capacitor dielectric layer formed upon the first capacitor plate layer; and    a second capacitor plate layer formed upon the capacitor dielectric layer, wherein: 
 at least one of the first capacitor plate layer and the second capacitor plate layer is formed of a doped amorphous silicon material.  
   
   
   
       13 . The capacitor structure of  claim 12  wherein the capacitor structure is employed within a microelectronic fabrication selected from the group consisting of integrated circuit microelectronic fabrications, ceramic substrate microelectronic fabrications, solar cell optoelectronic microelectronic fabrications, sensor image array optoelectronic microelectronic fabrications and display image array optoelectronic microelectronic fabrications.  
   
   
       14 . A dynamic random access memory cell structure comprising: 
 a semiconductor substrate having formed therein a field effect transistor device;    a capacitor structure formed over the semiconductor substrate and electrically connected with a first source/drain region within the field effect transistor device, the capacitor structure comprising: 
 a first capacitor plate layer;  
 a capacitor dielectric layer formed upon the first capacitor plate layer; and  
 a second capacitor plate layer formed upon the capacitor dielectric layer, wherein: 
 at least one of the first capacitor plate layer and the second capacitor plate layer is formed of a doped amorphous silicon material.