System and method for increasing the ball pitch of an electronic circuit package

Abstract

The invention provides an electronic package comprising a die bonded to a substrate, where the die has a fine pitch and the substrate has a coarse pitch. The dies and the substrate each have a plurality of individual lead frame interconnect arrays, with one end of an interconnect bonded to the die at a die pad and another end of the interconnect bonded to the substrate at a substrate pad. The substrate interconnect pads have a greater pitch then the die interconnect pads.

1 . An electronic package comprising a die bonded to a substrate, said die having a fine pitch and said substrate having a coarse pitch, said die and said substrate having a plurality of individual lead frame interconnect arrays, one end of an interconnect bonded to the die at a die pad and another end of the interconnect bonded to the substrate at a substrate pad, the substrate interconnect pads having a greater pitch then the die interconnect pads.  
     
     
         2 . The electronic package of  claim 1  further comprising solder ball interconnects at the substrate pad.  
     
     
         3 . A package according to  claim 1 , wherein the interconnect pads allows for the use of a relatively reduced resolution pitch pad.  
     
     
         4 . A method of preparing an integrated circuit chip from a multi-chip wafer where an individual chip in the wafer has a surrounding sacrificial periphery, comprising the steps of: 
 patterning the multi-chip wafer;    depositing a sacrificial layer atop the multi-chip wafer;    patterning the sacrificial layer;    depositing a conductor atop the sacrificial layer with leads therefrom extending through the sacrificial layer to integrated circuits of the underlying integrated circuit;    separating the multichip wafer into individual integrated circuits.    
     
     
         5 . The method of  claim 4  comprising applying ultrasonic energy to the multichip wafer to separate the said multichip wafer into individual integrated circuit chips.